$comment
	File created using the following command:
		vcd file decoder.msim.vcd -direction
$end
$date
	Thu Jan 21 20:12:12 2021
$end
$version
	ModelSim Version 10.5b
$end
$timescale
	1ps
$end

$scope module decoder_vlg_vec_tst $end
$var reg 1 ! A $end
$var reg 1 " B $end
$var wire 1 # Q0 $end
$var wire 1 $ Q1 $end
$var wire 1 % Q2 $end
$var wire 1 & Q3 $end

$scope module i1 $end
$var wire 1 ' gnd $end
$var wire 1 ( vcc $end
$var wire 1 ) unknown $end
$var tri1 1 * devclrn $end
$var tri1 1 + devpor $end
$var tri1 1 , devoe $end
$var wire 1 - ~QUARTUS_CREATED_GND~I_combout $end
$var wire 1 . ~QUARTUS_CREATED_UNVM~~busy $end
$var wire 1 / ~QUARTUS_CREATED_ADC1~~eoc $end
$var wire 1 0 ~QUARTUS_CREATED_ADC2~~eoc $end
$var wire 1 1 Q0~output_o $end
$var wire 1 2 Q1~output_o $end
$var wire 1 3 Q2~output_o $end
$var wire 1 4 Q3~output_o $end
$var wire 1 5 B~input_o $end
$var wire 1 6 A~input_o $end
$var wire 1 7 inst~combout $end
$var wire 1 8 inst2~0_combout $end
$var wire 1 9 inst2~1_combout $end
$var wire 1 : inst2~2_combout $end
$upscope $end
$upscope $end
$enddefinitions $end
#0
$dumpvars
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$end
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