MSP430 Linker PC v20.2.5.LTS
Copyright (c) 2003-2018 Texas Instruments Incorporated
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ADC12
0xffee
0xffee
0x2
USCIAB0TX
0xfff0
0xfff0
0x2
USCIAB0RX
0xfff2
0xfff2
0x2
WDT
0xfff4
0xfff4
0x2
COMPARATORA
0xfff6
0xfff6
0x2
TIMERB1
0xfff8
0xfff8
0x2
TIMERB0
0xfffa
0xfffa
0x2
NMI
0xfffc
0xfffc
0x2
.reset
0xfffe
0xfffe
0x2
.TI.persistent
0x0
0x0
.debug_info
0x0
0x0
0x24c3
.debug_line
0x0
0x0
0xbb8
.debug_frame
0x0
0x0
0x31c
.debug_abbrev
0x0
0x0
0x930
.debug_str
0x0
0x0
0xd7a
.debug_aranges
0x0
0x0
0x220
.debug_pubnames
0x0
0x0
0x2b6
.debug_pubtypes
0x0
0x0
0x30b
$fill000
0xffbe
0xffbe
0x2
SEGMENT_0
0x1100
0x2
0x6
SEGMENT_1
0x30b0
0x50
0x6
SEGMENT_2
0x3100
0x3100
0x27e
0x5
SEGMENT_3
0xffbe
0xffbe
0x2
0x4
SEGMENT_4
0xffdc
0xffdc
0x24
0x4
SFR
0x0
0x0
0x10
0x0
0x10
RWIX
PERIPHERALS_8BIT
0x0
0x10
0xf0
0x0
0xf0
RWIX
PERIPHERALS_16BIT
0x0
0x100
0x100
0x0
0x100
RWIX
INFOB
0x0
0x1000
0x80
0x0
0x80
RWIX
INFOA
0x0
0x1080
0x80
0x0
0x80
RWIX
RAM
0x0
0x1100
0x2000
0x52
0x1fae
RWIX
0x1100
0x2
0x1102
0x1fae
0x30b0
0x50
FLASH
0x0
0x3100
0xcebe
0x27e
0xcc40
RWIX
0x3100
0x0
0x3100
0x268
0x3368
0x8
0x3370
0xe
0x337e
0xcc40
BSLSIGNATURE
0x0
0xffbe
0x2
0x2
0x0
RWIX
0xffff
0x10
0x0
0xffbe
0x2
INT00
0x0
0xffc0
0x2
0x0
0x2
RWIX
INT01
0x0
0xffc2
0x2
0x0
0x2
RWIX
INT02
0x0
0xffc4
0x2
0x0
0x2
RWIX
INT03
0x0
0xffc6
0x2
0x0
0x2
RWIX
INT04
0x0
0xffc8
0x2
0x0
0x2
RWIX
INT05
0x0
0xffca
0x2
0x0
0x2
RWIX
INT06
0x0
0xffcc
0x2
0x0
0x2
RWIX
INT07
0x0
0xffce
0x2
0x0
0x2
RWIX
INT08
0x0
0xffd0
0x2
0x0
0x2
RWIX
INT09
0x0
0xffd2
0x2
0x0
0x2
RWIX
INT10
0x0
0xffd4
0x2
0x0
0x2
RWIX
INT11
0x0
0xffd6
0x2
0x0
0x2
RWIX
INT12
0x0
0xffd8
0x2
0x0
0x2
RWIX
INT13
0x0
0xffda
0x2
0x0
0x2
RWIX
INT14
0x0
0xffdc
0x2
0x2
0x0
RWIX
0xffdc
0x2
INT15
0x0
0xffde
0x2
0x2
0x0
RWIX
0xffde
0x2
INT16
0x0
0xffe0
0x2
0x2
0x0
RWIX
0xffe0
0x2
INT17
0x0
0xffe2
0x2
0x2
0x0
RWIX
0xffe2
0x2
INT18
0x0
0xffe4
0x2
0x2
0x0
RWIX
0xffe4
0x2
INT19
0x0
0xffe6
0x2
0x2
0x0
RWIX
0xffe6
0x2
INT20
0x0
0xffe8
0x2
0x2
0x0
RWIX
0xffe8
0x2
INT21
0x0
0xffea
0x2
0x2
0x0
RWIX
0xffea
0x2
INT22
0x0
0xffec
0x2
0x2
0x0
RWIX
0xffec
0x2
INT23
0x0
0xffee
0x2
0x2
0x0
RWIX
0xffee
0x2
INT24
0x0
0xfff0
0x2
0x2
0x0
RWIX
0xfff0
0x2
INT25
0x0
0xfff2
0x2
0x2
0x0
RWIX
0xfff2
0x2
INT26
0x0
0xfff4
0x2
0x2
0x0
RWIX
0xfff4
0x2
INT27
0x0
0xfff6
0x2
0x2
0x0
RWIX
0xfff6
0x2
INT28
0x0
0xfff8
0x2
0x2
0x0
RWIX
0xfff8
0x2
INT29
0x0
0xfffa
0x2
0x2
0x0
RWIX
0xfffa
0x2
INT30
0x0
0xfffc
0x2
0x2
0x0
RWIX
0xfffc
0x2
RESET
0x0
0xfffe
0x2
0x2
0x0
RWIX
0xfffe
0x2
FLASH2
0x0
0x10000
0x10000
0x0
0x10000
RWIX
__TI_cinit_table
.data
0x3370
0x6
0x1100
0x2
copy
__TI_handler_table
0x0
__TI_decompress_lzss
0x1
__TI_decompress_none
IE1
0x0
IFG1
0x2
IE2
0x1
IFG2
0x3
ME2
0x5
ADC12CTL0
0x1a0
ADC12CTL1
0x1a2
ADC12IFG
0x1a4
ADC12IE
0x1a6
ADC12IV
0x1a8
ADC12MEM0
0x140
ADC12MEM1
0x142
ADC12MEM2
0x144
ADC12MEM3
0x146
ADC12MEM4
0x148
ADC12MEM5
0x14a
ADC12MEM6
0x14c
ADC12MEM7
0x14e
ADC12MEM8
0x150
ADC12MEM9
0x152
ADC12MEM10
0x154
ADC12MEM11
0x156
ADC12MEM12
0x158
ADC12MEM13
0x15a
ADC12MEM14
0x15c
ADC12MEM15
0x15e
ADC12MCTL0
0x80
ADC12MCTL1
0x81
ADC12MCTL2
0x82
ADC12MCTL3
0x83
ADC12MCTL4
0x84
ADC12MCTL5
0x85
ADC12MCTL6
0x86
ADC12MCTL7
0x87
ADC12MCTL8
0x88
ADC12MCTL9
0x89
ADC12MCTL10
0x8a
ADC12MCTL11
0x8b
ADC12MCTL12
0x8c
ADC12MCTL13
0x8d
ADC12MCTL14
0x8e
ADC12MCTL15
0x8f
BTCTL
0x40
RTCCTL
0x41
RTCNT1
0x42
RTCNT2
0x43
RTCNT3
0x44
RTCNT4
0x45
BTCNT1
0x46
BTCNT2
0x47
RTCDAY
0x4c
RTCMON
0x4d
RTCYEARL
0x4e
RTCYEARH
0x4f
RTCTL
0x40
RTCTIM0
0x42
RTCTIM1
0x44
BTCNT12
0x46
RTCDATE
0x4c
RTCYEAR
0x4e
CACTL1
0x59
CACTL2
0x5a
CAPD
0x5b
DAC12_0CTL
0x1c0
DAC12_1CTL
0x1c2
DAC12_0DAT
0x1c8
DAC12_1DAT
0x1ca
DMACTL0
0x122
DMACTL1
0x124
DMAIV
0x126
DMA0CTL
0x1d0
DMA1CTL
0x1dc
DMA2CTL
0x1e8
DMA0SA
0x1d2
DMA0SAL
0x1d2
DMA0DA
0x1d6
DMA0DAL
0x1d6
DMA0SZ
0x1da
DMA1SA
0x1de
DMA1SAL
0x1de
DMA1DA
0x1e2
DMA1DAL
0x1e2
DMA1SZ
0x1e6
DMA2SA
0x1ea
DMA2SAL
0x1ea
DMA2DA
0x1ee
DMA2DAL
0x1ee
DMA2SZ
0x1f2
FCTL1
0x128
FCTL2
0x12a
FCTL3
0x12c
SCFI0
0x50
SCFI1
0x51
SCFQCTL
0x52
FLL_CTL0
0x53
FLL_CTL1
0x54
LCDACTL
0x90
LCDAPCTL0
0xac
LCDAPCTL1
0xad
LCDAVCTL0
0xae
LCDAVCTL1
0xaf
LCDM1
0x91
LCDM2
0x92
LCDM3
0x93
LCDM4
0x94
LCDM5
0x95
LCDM6
0x96
LCDM7
0x97
LCDM8
0x98
LCDM9
0x99
LCDM10
0x9a
LCDM11
0x9b
LCDM12
0x9c
LCDM13
0x9d
LCDM14
0x9e
LCDM15
0x9f
LCDM16
0xa0
LCDM17
0xa1
LCDM18
0xa2
LCDM19
0xa3
LCDM20
0xa4
MPY
0x130
MPYS
0x132
MAC
0x134
MACS
0x136
OP2
0x138
RESLO
0x13a
RESHI
0x13c
SUMEXT
0x13e
OA0CTL0
0xc0
OA0CTL1
0xc1
OA1CTL0
0xc2
OA1CTL1
0xc3
OA2CTL0
0xc4
OA2CTL1
0xc5
P1IN
0x20
P1OUT
0x21
P1DIR
0x22
P1IFG
0x23
P1IES
0x24
P1IE
0x25
P1SEL
0x26
P2IN
0x28
P2OUT
0x29
P2DIR
0x2a
P2IFG
0x2b
P2IES
0x2c
P2IE
0x2d
P2SEL
0x2e
P3IN
0x18
P3OUT
0x19
P3DIR
0x1a
P3SEL
0x1b
P4IN
0x1c
P4OUT
0x1d
P4DIR
0x1e
P4SEL
0x1f
P5IN
0x30
P5OUT
0x31
P5DIR
0x32
P5SEL
0x33
P6IN
0x34
P6OUT
0x35
P6DIR
0x36
P6SEL
0x37
P7IN
0x38
P7OUT
0x3a
P7DIR
0x3c
P7SEL
0x3e
P8IN
0x39
P8OUT
0x3b
P8DIR
0x3d
P8SEL
0x3f
PAIN
0x38
PAOUT
0x3a
PADIR
0x3c
PASEL
0x3e
P9IN
0x8
P9OUT
0xa
P9DIR
0xc
P9SEL
0xe
P10IN
0x9
P10OUT
0xb
P10DIR
0xd
P10SEL
0xf
PBIN
0x8
PBOUT
0xa
PBDIR
0xc
PBSEL
0xe
SVSCTL
0x56
TAIV
0x12e
TACTL
0x160
TACCTL0
0x162
TACCTL1
0x164
TACCTL2
0x166
TAR
0x170
TACCR0
0x172
TACCR1
0x174
TACCR2
0x176
TBIV
0x11e
TBCTL
0x180
TBCCTL0
0x182
TBCCTL1
0x184
TBCCTL2
0x186
TBCCTL3
0x188
TBCCTL4
0x18a
TBCCTL5
0x18c
TBCCTL6
0x18e
TBR
0x190
TBCCR0
0x192
TBCCR1
0x194
TBCCR2
0x196
TBCCR3
0x198
TBCCR4
0x19a
TBCCR5
0x19c
TBCCR6
0x19e
UCA0CTL0
0x60
UCA0CTL1
0x61
UCA0BR0
0x62
UCA0BR1
0x63
UCA0MCTL
0x64
UCA0STAT
0x65
UCA0RXBUF
0x66
UCA0TXBUF
0x67
UCA0ABCTL
0x5d
UCA0IRTCTL
0x5e
UCA0IRRCTL
0x5f
UCB0CTL0
0x68
UCB0CTL1
0x69
UCB0BR0
0x6a
UCB0BR1
0x6b
UCB0I2CIE
0x6c
UCB0STAT
0x6d
UCB0RXBUF
0x6e
UCB0TXBUF
0x6f
UCB0I2COA
0x118
UCB0I2CSA
0x11a
U1CTL
0x78
U1TCTL
0x79
U1RCTL
0x7a
U1MCTL
0x7b
U1BR0
0x7c
U1BR1
0x7d
U1RXBUF
0x7e
U1TXBUF
0x7f
WDTCTL
0x120
__TI_CINIT_Base
0x337a
__TI_CINIT_Limit
0x337e
__TI_Handler_Table_Base
0x3376
__TI_Handler_Table_Limit
0x337a
__STACK_SIZE
0x50
__STACK_END
0x3100
__c_args__
0xffffffff
__TI_pprof_out_hndl
0xffffffff
__TI_prof_data_start
0xffffffff
__TI_prof_data_size
0xffffffff
__TI_int28
0xfff8
__TI_int29
0xfffa
__TI_int26
0xfff4
__TI_int20
0xffe8
Up
0x1100
Port1_ISR
0x3282
watchdog_timer
0x32da
main
0x317c
timerISR2
0x3348
timerISR
0x3352
__TI_int14
0xffdc
__TI_int15
0xffde
__TI_int16
0xffe0
__TI_int17
0xffe2
__TI_int18
0xffe4
__TI_int19
0xffe6
__TI_int21
0xffea
__TI_int22
0xffec
__TI_int23
0xffee
__TI_int24
0xfff0
__TI_int25
0xfff2
__TI_int27
0xfff6
__TI_int30
0xfffc
__TI_ISR_TRAP
0x3368
_stack
0x30b0
_c_int00_noargs
0x32f8
_reset_vector
0xfffe
__TI_auto_init_nobinit_nopinit_hold_wdt
0x31de
_system_pre_init
0x3362
_system_post_cinit
0x3366
__TI_decompress_none
0x3314
__TI_decompress_lzss
0x3100
C$$EXIT
0x335c
abort
0x335c
memcpy
0x3326
__mspabi_func_epilog_2
0x3342
__mspabi_func_epilog_3
0x3340
__mspabi_func_epilog_1
0x3344
__mspabi_func_epilog_6
0x333a
__mspabi_func_epilog_7
0x3338
__mspabi_func_epilog_4
0x333e
__mspabi_func_epilog_5
0x333c
__mspabi_slli
0x32ae
__mspabi_slli_9
0x32c6
__mspabi_slli_8
0x32c8
__mspabi_slli_7
0x32ca
__mspabi_slli_6
0x32cc
__mspabi_slli_5
0x32ce
__mspabi_slli_4
0x32d0
__mspabi_slli_3
0x32d2
__mspabi_slli_2
0x32d4
__mspabi_slli_1
0x32d6
__mspabi_slli_15
0x32ba
__mspabi_slli_14
0x32bc
__mspabi_slli_13
0x32be
__mspabi_slli_12
0x32c0
__mspabi_slli_11
0x32c2
__mspabi_slli_10
0x32c4
__mspabi_srli_8
0x3260
__mspabi_srli_9
0x325c
__mspabi_srli_6
0x3268
__mspabi_srli_7
0x3264
__mspabi_srli_4
0x3270
__mspabi_srli_5
0x326c
__mspabi_srli_2
0x3278
__mspabi_srli_3
0x3274
__mspabi_srli_1
0x327c
__mspabi_srli
0x3236
__mspabi_srli_15
0x3244
__mspabi_srli_14
0x3248
__mspabi_srli_13
0x324c
__mspabi_srli_12
0x3250
__mspabi_srli_11
0x3254
__mspabi_srli_10
0x3258
Link successful