1
0
UAHCode/EE203/Noah Woodlee/LAB1/Part3/db/Part3.eda.qmsg

7 lines
6.3 KiB
Plaintext
Raw Permalink Normal View History

2022-08-28 21:12:16 +00:00
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1615517258442 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus Prime " "Running Quartus Prime EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.0 Build 196 10/24/2016 SJ Lite Edition " "Version 16.1.0 Build 196 10/24/2016 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1615517258442 ""} { "Info" "IQEXE_START_BANNER_LEGAL" "Copyright (C) 2016 Intel Corporation. All rights reserved. " "Copyright (C) 2016 Intel Corporation. All rights reserved." { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1615517258442 ""} { "Info" "IQEXE_START_BANNER_LEGAL" "Your use of Intel Corporation's design tools, logic functions " "Your use of Intel Corporation's design tools, logic functions " { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1615517258442 ""} { "Info" "IQEXE_START_BANNER_LEGAL" "and other software and tools, and its AMPP partner logic " "and other software and tools, and its AMPP partner logic " { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1615517258442 ""} { "Info" "IQEXE_START_BANNER_LEGAL" "functions, and any output files from any of the foregoing " "functions, and any output files from any of the foregoing " { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1615517258442 ""} { "Info" "IQEXE_START_BANNER_LEGAL" "(including device programming or simulation files), and any " "(including device programming or simulation files), and any " { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1615517258442 ""} { "Info" "IQEXE_START_BANNER_LEGAL" "associated documentation or information are expressly subject " "associated documentation or information are expressly subject " { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1615517258442 ""} { "Info" "IQEXE_START_BANNER_LEGAL" "to the terms and conditions of the Intel Program License " "to the terms and conditions of the Intel Program License " { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1615517258442 ""} { "Info" "IQEXE_START_BANNER_LEGAL" "Subscription Agreement, the Intel Quartus Prime License Agreement, " "Subscription Agreement, the Intel Quartus Prime License Agreement," { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1615517258442 ""} { "Info" "IQEXE_START_BANNER_LEGAL" "the Intel MegaCore Function License Agreement, or other " "the Intel MegaCore Function License Agreement, or other " { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1615517258442 ""} { "Info" "IQEXE_START_BANNER_LEGAL" "applicable license agreement, including, without limitation, " "applicable license agreement, including, without limitation, " { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1615517258442 ""} { "Info" "IQEXE_START_BANNER_LEGAL" "that your use is for the sole purpose of programming logic " "that your use is for the sole purpose of programming logic " { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1615517258442 ""} { "Info" "IQEXE_START_BANNER_LEGAL" "devices manufactured by Intel and sold by Intel or its " "devices manufactured by Intel and sold by Intel or its " { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1615517258442 ""} { "Info" "IQEXE_START_BANNER_LEGAL" "authorized distributors. Please refer to the applicable " "authorized distributors. Please refer to the applicable " { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1615517258442 ""} { "Info" "IQEXE_START_BANNER_LEGAL" "agreement for further details. " "agreement for further details." { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1615517258442 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Mar 11 20:47:38 2021 " "Processing started: Thu Mar 11 20:47:38 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1615517258442 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1615517258442 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --write_settings_files=off --simulation=on --functional=on --flatten_buses=off --tool=modelsim_oem --format=verilog --output_directory=\"C:/Users/anw0044/Desktop/Noah Woodlee/LAB1/Part3/simulation/qsim/\" Part3 -c Part3 " "Command: quartus_eda --write_settings_files=off --simulation=on --functional=on --flatten_buses=off --tool=modelsim_oem --format=verilog --output_directory=\"C:/Users/anw0044/Desktop/Noah Woodlee/LAB1/Part3/simulation/qsim/\" Part3 -c Part3" { } { } 0 0 "Command: %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1615517258442 ""}
{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "EDA Netlist Writer" 0 -1 1615517258722 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "Part3.vo C:/Users/anw0044/Desktop/Noah Woodlee/LAB1/Part3/simulation/qsim// simulation " "Generated file Part3.vo in folder \"C:/Users/anw0044/Desktop/Noah Woodlee/LAB1/Part3/simulation/qsim//\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "EDA Netlist Writer" 0 -1 1615517258772 ""}
{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 1 Quartus Prime " "Quartus Prime EDA Netlist Writer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4641 " "Peak virtual memory: 4641 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1615517258822 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Mar 11 20:47:38 2021 " "Processing ended: Thu Mar 11 20:47:38 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1615517258822 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Elapsed time: 00:00:00" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1615517258822 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1615517258822 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1615517258822 ""}