125 lines
1.9 KiB
Plaintext
125 lines
1.9 KiB
Plaintext
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$comment
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File created using the following command:
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vcd file part3.msim.vcd -direction
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$end
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$date
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Sun Apr 25 00:52:04 2021
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$end
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$version
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ModelSim Version 2020.1
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$end
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$timescale
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1ps
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$end
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$scope module part3_vlg_vec_tst $end
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$var reg 9 ! SW [8:0] $end
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$var wire 1 " LEDR [4] $end
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$var wire 1 # LEDR [3] $end
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$var wire 1 $ LEDR [2] $end
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$var wire 1 % LEDR [1] $end
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$var wire 1 & LEDR [0] $end
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$scope module i1 $end
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$var wire 1 ' gnd $end
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$var wire 1 ( vcc $end
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$var wire 1 ) unknown $end
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$var tri1 1 * devclrn $end
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$var tri1 1 + devpor $end
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$var tri1 1 , devoe $end
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$var wire 1 - ~QUARTUS_CREATED_GND~I_combout $end
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$var wire 1 . ~QUARTUS_CREATED_UNVM~~busy $end
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$var wire 1 / ~QUARTUS_CREATED_ADC1~~eoc $end
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$var wire 1 0 ~QUARTUS_CREATED_ADC2~~eoc $end
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$var wire 1 1 LEDR[0]~output_o $end
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$var wire 1 2 LEDR[1]~output_o $end
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$var wire 1 3 LEDR[2]~output_o $end
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$var wire 1 4 LEDR[3]~output_o $end
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$var wire 1 5 LEDR[4]~output_o $end
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$var wire 1 6 SW[4]~input_o $end
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$var wire 1 7 SW[0]~input_o $end
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$var wire 1 8 SW[8]~input_o $end
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$var wire 1 9 A0|x1~combout $end
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$var wire 1 : SW[5]~input_o $end
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$var wire 1 ; SW[1]~input_o $end
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$var wire 1 < A0|COUT~0_combout $end
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$var wire 1 = A1|x1~combout $end
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$var wire 1 > SW[2]~input_o $end
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$var wire 1 ? SW[6]~input_o $end
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$var wire 1 @ A2|x0~combout $end
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$var wire 1 A A2|x1~combout $end
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$var wire 1 B A2|COUT~2_combout $end
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$var wire 1 C A2|COUT~3_combout $end
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$var wire 1 D SW[3]~input_o $end
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$var wire 1 E SW[7]~input_o $end
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$var wire 1 F A3|x1~combout $end
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$var wire 1 G A3|COUT~0_combout $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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#0
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$dumpvars
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b111000100 !
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1&
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0%
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0$
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0#
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1"
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0'
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1(
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x)
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1*
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1+
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1,
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0-
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z.
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z/
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z0
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11
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02
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03
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04
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15
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06
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07
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18
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19
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0:
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0;
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0<
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0=
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1>
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1?
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0@
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0A
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0B
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1C
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0D
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1E
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0F
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1G
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$end
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#400000
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b11000100 !
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b1000100 !
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b100 !
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b0 !
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08
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0E
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0?
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0>
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0C
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09
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0G
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1F
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14
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05
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01
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0&
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0"
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1#
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0F
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04
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0#
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#1000000
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