185 lines
11 KiB
Batchfile
Executable File
185 lines
11 KiB
Batchfile
Executable File
/* ============================================================================ */
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/* Copyright (c) 2020, Texas Instruments Incorporated */
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/* All rights reserved. */
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/* */
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/* Redistribution and use in source and binary forms, with or without */
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/* modification, are permitted provided that the following conditions */
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/* are met: */
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/* */
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/* * Redistributions of source code must retain the above copyright */
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/* notice, this list of conditions and the following disclaimer. */
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/* */
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/* * Redistributions in binary form must reproduce the above copyright */
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/* notice, this list of conditions and the following disclaimer in the */
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/* documentation and/or other materials provided with the distribution. */
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/* */
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/* * Neither the name of Texas Instruments Incorporated nor the names of */
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/* its contributors may be used to endorse or promote products derived */
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/* from this software without specific prior written permission. */
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/* */
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/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
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/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
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/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
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/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
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/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
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/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
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/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
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/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
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/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
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/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
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/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
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/* ============================================================================ */
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/******************************************************************************/
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/* lnk_msp430fg4618.cmd - LINKER COMMAND FILE FOR LINKING MSP430FG4618 PROGRAMS */
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/* */
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/* Usage: lnk430 <obj files...> -o <out file> -m <map file> lnk.cmd */
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/* cl430 <src files...> -z -o <out file> -m <map file> lnk.cmd */
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/* */
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/*----------------------------------------------------------------------------*/
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/* These linker options are for command line linking only. For IDE linking, */
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/* you should set your linker options in Project Properties */
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/* -c LINK USING C CONVENTIONS */
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/* -stack 0x0100 SOFTWARE STACK SIZE */
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/* -heap 0x0100 HEAP AREA SIZE */
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/* */
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/*----------------------------------------------------------------------------*/
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/* Version: 1.211 */
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/*----------------------------------------------------------------------------*/
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/****************************************************************************/
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/* Specify the system memory map */
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/****************************************************************************/
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MEMORY
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{
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SFR : origin = 0x0000, length = 0x0010
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PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0
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PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100
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RAM : origin = 0x1100, length = 0x2000
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INFOA : origin = 0x1080, length = 0x0080
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INFOB : origin = 0x1000, length = 0x0080
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FLASH : origin = 0x3100, length = 0xCEBE
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FLASH2 : origin = 0x10000,length = 0x10000
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BSLSIGNATURE : origin = 0xFFBE, length = 0x0002, fill = 0xFFFF
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INT00 : origin = 0xFFC0, length = 0x0002
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INT01 : origin = 0xFFC2, length = 0x0002
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INT02 : origin = 0xFFC4, length = 0x0002
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INT03 : origin = 0xFFC6, length = 0x0002
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INT04 : origin = 0xFFC8, length = 0x0002
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INT05 : origin = 0xFFCA, length = 0x0002
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INT06 : origin = 0xFFCC, length = 0x0002
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INT07 : origin = 0xFFCE, length = 0x0002
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INT08 : origin = 0xFFD0, length = 0x0002
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INT09 : origin = 0xFFD2, length = 0x0002
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INT10 : origin = 0xFFD4, length = 0x0002
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INT11 : origin = 0xFFD6, length = 0x0002
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INT12 : origin = 0xFFD8, length = 0x0002
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INT13 : origin = 0xFFDA, length = 0x0002
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INT14 : origin = 0xFFDC, length = 0x0002
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INT15 : origin = 0xFFDE, length = 0x0002
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INT16 : origin = 0xFFE0, length = 0x0002
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INT17 : origin = 0xFFE2, length = 0x0002
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INT18 : origin = 0xFFE4, length = 0x0002
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INT19 : origin = 0xFFE6, length = 0x0002
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INT20 : origin = 0xFFE8, length = 0x0002
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INT21 : origin = 0xFFEA, length = 0x0002
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INT22 : origin = 0xFFEC, length = 0x0002
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INT23 : origin = 0xFFEE, length = 0x0002
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INT24 : origin = 0xFFF0, length = 0x0002
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INT25 : origin = 0xFFF2, length = 0x0002
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INT26 : origin = 0xFFF4, length = 0x0002
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INT27 : origin = 0xFFF6, length = 0x0002
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INT28 : origin = 0xFFF8, length = 0x0002
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INT29 : origin = 0xFFFA, length = 0x0002
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INT30 : origin = 0xFFFC, length = 0x0002
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RESET : origin = 0xFFFE, length = 0x0002
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}
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/****************************************************************************/
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/* Specify the sections allocation into memory */
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/****************************************************************************/
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SECTIONS
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{
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.bss : {} > RAM /* Global & static vars */
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.data : {} > RAM /* Global & static vars */
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.TI.noinit : {} > RAM /* For #pragma noinit */
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.sysmem : {} > RAM /* Dynamic memory allocation area */
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.stack : {} > RAM (HIGH) /* Software system stack */
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#ifndef __LARGE_CODE_MODEL__
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.text : {} > FLASH /* Code */
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#else
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.text : {} >> FLASH2 | FLASH /* Code */
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#endif
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.text:_isr : {} > FLASH /* ISR Code space */
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.cinit : {} > FLASH /* Initialization tables */
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#ifndef __LARGE_DATA_MODEL__
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.const : {} > FLASH /* Constant data */
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#else
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.const : {} >> FLASH | FLASH2 /* Constant data */
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#endif
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.bslsignature : {} > BSLSIGNATURE /* BSL Signature */
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.cio : {} > RAM /* C I/O Buffer */
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.pinit : {} > FLASH /* C++ Constructor tables */
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.binit : {} > FLASH /* Boot-time Initialization tables */
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.init_array : {} > FLASH /* C++ Constructor tables */
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.mspabi.exidx : {} > FLASH /* C++ Constructor tables */
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.mspabi.extab : {} > FLASH /* C++ Constructor tables */
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#ifdef __TI_COMPILER_VERSION__
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#if __TI_COMPILER_VERSION__ >= 15009000
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#ifndef __LARGE_CODE_MODEL__
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.TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT)
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#else
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.TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT)
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#endif
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#endif
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#endif
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.infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */
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.infoB : {} > INFOB
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/* MSP430 Interrupt vectors */
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.int00 : {} > INT00
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.int01 : {} > INT01
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.int02 : {} > INT02
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.int03 : {} > INT03
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.int04 : {} > INT04
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.int05 : {} > INT05
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.int06 : {} > INT06
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.int07 : {} > INT07
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.int08 : {} > INT08
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.int09 : {} > INT09
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.int10 : {} > INT10
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.int11 : {} > INT11
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.int12 : {} > INT12
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.int13 : {} > INT13
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DAC12 : { * ( .int14 ) } > INT14 type = VECT_INIT
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DMA : { * ( .int15 ) } > INT15 type = VECT_INIT
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BASICTIMER : { * ( .int16 ) } > INT16 type = VECT_INIT
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PORT2 : { * ( .int17 ) } > INT17 type = VECT_INIT
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USART1TX : { * ( .int18 ) } > INT18 type = VECT_INIT
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USART1RX : { * ( .int19 ) } > INT19 type = VECT_INIT
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PORT1 : { * ( .int20 ) } > INT20 type = VECT_INIT
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TIMERA1 : { * ( .int21 ) } > INT21 type = VECT_INIT
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TIMERA0 : { * ( .int22 ) } > INT22 type = VECT_INIT
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ADC12 : { * ( .int23 ) } > INT23 type = VECT_INIT
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USCIAB0TX : { * ( .int24 ) } > INT24 type = VECT_INIT
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USCIAB0RX : { * ( .int25 ) } > INT25 type = VECT_INIT
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WDT : { * ( .int26 ) } > INT26 type = VECT_INIT
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COMPARATORA : { * ( .int27 ) } > INT27 type = VECT_INIT
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TIMERB1 : { * ( .int28 ) } > INT28 type = VECT_INIT
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TIMERB0 : { * ( .int29 ) } > INT29 type = VECT_INIT
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NMI : { * ( .int30 ) } > INT30 type = VECT_INIT
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.reset : {} > RESET /* MSP430 Reset vector */
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}
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/****************************************************************************/
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/* Include peripherals memory map */
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/****************************************************************************/
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-l msp430fg4618.cmd
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