added more code
This commit is contained in:
1
CPE325/Lab5/Debug/ccsObjs.opt
Normal file
1
CPE325/Lab5/Debug/ccsObjs.opt
Normal file
@ -0,0 +1 @@
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"./main.obj" "../lnk_msp430f5529.cmd" -llibmath.a -llibc.a
|
167
CPE325/Lab5/Debug/makefile
Normal file
167
CPE325/Lab5/Debug/makefile
Normal file
@ -0,0 +1,167 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
################################################################################
|
||||
|
||||
SHELL = cmd.exe
|
||||
|
||||
CG_TOOL_ROOT := C:/ti/ccs1040/ccs/tools/compiler/ti-cgt-msp430_20.2.5.LTS
|
||||
|
||||
GEN_OPTS__FLAG :=
|
||||
GEN_CMDS__FLAG :=
|
||||
|
||||
ORDERED_OBJS += \
|
||||
"./main.obj" \
|
||||
"../lnk_msp430f5529.cmd" \
|
||||
$(GEN_CMDS__FLAG) \
|
||||
-llibmath.a \
|
||||
-llibc.a \
|
||||
|
||||
-include ../makefile.init
|
||||
|
||||
RM := DEL /F
|
||||
RMDIR := RMDIR /S/Q
|
||||
|
||||
# All of the sources participating in the build are defined here
|
||||
-include sources.mk
|
||||
-include subdir_vars.mk
|
||||
-include subdir_rules.mk
|
||||
-include objects.mk
|
||||
|
||||
ifneq ($(MAKECMDGOALS),clean)
|
||||
ifneq ($(strip $(C55_DEPS)),)
|
||||
-include $(C55_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(C_UPPER_DEPS)),)
|
||||
-include $(C_UPPER_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(S67_DEPS)),)
|
||||
-include $(S67_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(S62_DEPS)),)
|
||||
-include $(S62_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(S_DEPS)),)
|
||||
-include $(S_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(OPT_DEPS)),)
|
||||
-include $(OPT_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(C??_DEPS)),)
|
||||
-include $(C??_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(ASM_UPPER_DEPS)),)
|
||||
-include $(ASM_UPPER_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(S??_DEPS)),)
|
||||
-include $(S??_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(C64_DEPS)),)
|
||||
-include $(C64_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(CXX_DEPS)),)
|
||||
-include $(CXX_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(S64_DEPS)),)
|
||||
-include $(S64_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(INO_DEPS)),)
|
||||
-include $(INO_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(CLA_DEPS)),)
|
||||
-include $(CLA_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(S55_DEPS)),)
|
||||
-include $(S55_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(SV7A_DEPS)),)
|
||||
-include $(SV7A_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(C62_DEPS)),)
|
||||
-include $(C62_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(C67_DEPS)),)
|
||||
-include $(C67_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(PDE_DEPS)),)
|
||||
-include $(PDE_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(K_DEPS)),)
|
||||
-include $(K_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(C_DEPS)),)
|
||||
-include $(C_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(CC_DEPS)),)
|
||||
-include $(CC_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(C++_DEPS)),)
|
||||
-include $(C++_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(C43_DEPS)),)
|
||||
-include $(C43_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(S43_DEPS)),)
|
||||
-include $(S43_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(ASM_DEPS)),)
|
||||
-include $(ASM_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(S_UPPER_DEPS)),)
|
||||
-include $(S_UPPER_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(CPP_DEPS)),)
|
||||
-include $(CPP_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(SA_DEPS)),)
|
||||
-include $(SA_DEPS)
|
||||
endif
|
||||
endif
|
||||
|
||||
-include ../makefile.defs
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
EXE_OUTPUTS += \
|
||||
Lab5.out \
|
||||
|
||||
EXE_OUTPUTS__QUOTED += \
|
||||
"Lab5.out" \
|
||||
|
||||
BIN_OUTPUTS += \
|
||||
Lab5.hex \
|
||||
|
||||
BIN_OUTPUTS__QUOTED += \
|
||||
"Lab5.hex" \
|
||||
|
||||
|
||||
# All Target
|
||||
all: $(OBJS) $(CMD_SRCS) $(GEN_CMDS)
|
||||
@$(MAKE) --no-print-directory -Onone "Lab5.out"
|
||||
|
||||
# Tool invocations
|
||||
Lab5.out: $(OBJS) $(CMD_SRCS) $(GEN_CMDS)
|
||||
@echo 'Building target: "$@"'
|
||||
@echo 'Invoking: MSP430 Linker'
|
||||
"C:/ti/ccs1040/ccs/tools/compiler/ti-cgt-msp430_20.2.5.LTS/bin/cl430" -vmspx --code_model=small --data_model=small --use_hw_mpy=F5 --advice:power=all --define=__MSP430F5529__ -g --printf_support=minimal --diag_warning=225 --diag_wrap=off --display_error_number --silicon_errata=CPU21 --silicon_errata=CPU22 --silicon_errata=CPU23 --silicon_errata=CPU40 -z -m"Lab5.map" --heap_size=0 --stack_size=0 --cinit_hold_wdt=on -i"C:/ti/ccs1040/ccs/ccs_base/msp430/include" -i"C:/ti/ccs1040/ccs/ccs_base/msp430/lib/5xx_6xx_FRxx" -i"C:/ti/ccs1040/ccs/tools/compiler/ti-cgt-msp430_20.2.5.LTS/lib" -i"C:/ti/ccs1040/ccs/tools/compiler/ti-cgt-msp430_20.2.5.LTS/include" --reread_libs --diag_wrap=off --display_error_number --warn_sections --xml_link_info="Lab5_linkInfo.xml" --entry_point=RESET --use_hw_mpy=F5 -o "Lab5.out" $(ORDERED_OBJS)
|
||||
@echo 'Finished building target: "$@"'
|
||||
@echo ' '
|
||||
|
||||
Lab5.hex: $(EXE_OUTPUTS)
|
||||
@echo 'Building secondary target: "$@"'
|
||||
@echo 'Invoking: MSP430 Hex Utility'
|
||||
"C:/ti/ccs1040/ccs/tools/compiler/ti-cgt-msp430_20.2.5.LTS/bin/hex430" --memwidth=8 --romwidth=8 --diag_wrap=off -o "Lab5.hex" $(EXE_OUTPUTS__QUOTED)
|
||||
@echo 'Finished building secondary target: "$@"'
|
||||
@echo ' '
|
||||
|
||||
# Other Targets
|
||||
clean:
|
||||
-$(RM) $(BIN_OUTPUTS__QUOTED)$(EXE_OUTPUTS__QUOTED)
|
||||
-$(RM) "main.obj"
|
||||
-$(RM) "main.d"
|
||||
-@echo 'Finished clean'
|
||||
-@echo ' '
|
||||
|
||||
.PHONY: all clean dependents
|
||||
.SECONDARY:
|
||||
|
||||
-include ../makefile.targets
|
||||
|
8
CPE325/Lab5/Debug/objects.mk
Normal file
8
CPE325/Lab5/Debug/objects.mk
Normal file
@ -0,0 +1,8 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
################################################################################
|
||||
|
||||
USER_OBJS :=
|
||||
|
||||
LIBS := -llibmath.a -llibc.a
|
||||
|
115
CPE325/Lab5/Debug/sources.mk
Normal file
115
CPE325/Lab5/Debug/sources.mk
Normal file
@ -0,0 +1,115 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
################################################################################
|
||||
|
||||
C55_SRCS :=
|
||||
A_SRCS :=
|
||||
ASM_UPPER_SRCS :=
|
||||
EXE_SRCS :=
|
||||
LDS_UPPER_SRCS :=
|
||||
CPP_SRCS :=
|
||||
CMD_SRCS :=
|
||||
O_SRCS :=
|
||||
ELF_SRCS :=
|
||||
C??_SRCS :=
|
||||
C64_SRCS :=
|
||||
C67_SRCS :=
|
||||
SA_SRCS :=
|
||||
S64_SRCS :=
|
||||
OPT_SRCS :=
|
||||
CXX_SRCS :=
|
||||
S67_SRCS :=
|
||||
S??_SRCS :=
|
||||
PDE_SRCS :=
|
||||
SV7A_SRCS :=
|
||||
K_SRCS :=
|
||||
CLA_SRCS :=
|
||||
S55_SRCS :=
|
||||
LD_UPPER_SRCS :=
|
||||
OUT_SRCS :=
|
||||
INO_SRCS :=
|
||||
LIB_SRCS :=
|
||||
ASM_SRCS :=
|
||||
S_UPPER_SRCS :=
|
||||
S43_SRCS :=
|
||||
LD_SRCS :=
|
||||
CMD_UPPER_SRCS :=
|
||||
C_UPPER_SRCS :=
|
||||
C++_SRCS :=
|
||||
C43_SRCS :=
|
||||
OBJ_SRCS :=
|
||||
LDS_SRCS :=
|
||||
S_SRCS :=
|
||||
CC_SRCS :=
|
||||
S62_SRCS :=
|
||||
C62_SRCS :=
|
||||
C_SRCS :=
|
||||
C55_DEPS :=
|
||||
C_UPPER_DEPS :=
|
||||
S67_DEPS :=
|
||||
S62_DEPS :=
|
||||
S_DEPS :=
|
||||
OPT_DEPS :=
|
||||
C??_DEPS :=
|
||||
ASM_UPPER_DEPS :=
|
||||
S??_DEPS :=
|
||||
C64_DEPS :=
|
||||
CXX_DEPS :=
|
||||
S64_DEPS :=
|
||||
INO_DEPS :=
|
||||
CLA_DEPS :=
|
||||
S55_DEPS :=
|
||||
SV7A_DEPS :=
|
||||
EXE_OUTPUTS :=
|
||||
C62_DEPS :=
|
||||
C67_DEPS :=
|
||||
PDE_DEPS :=
|
||||
K_DEPS :=
|
||||
C_DEPS :=
|
||||
CC_DEPS :=
|
||||
BIN_OUTPUTS :=
|
||||
C++_DEPS :=
|
||||
C43_DEPS :=
|
||||
S43_DEPS :=
|
||||
OBJS :=
|
||||
ASM_DEPS :=
|
||||
S_UPPER_DEPS :=
|
||||
CPP_DEPS :=
|
||||
SA_DEPS :=
|
||||
C++_DEPS__QUOTED :=
|
||||
OPT_DEPS__QUOTED :=
|
||||
S_UPPER_DEPS__QUOTED :=
|
||||
SA_DEPS__QUOTED :=
|
||||
C??_DEPS__QUOTED :=
|
||||
S67_DEPS__QUOTED :=
|
||||
C55_DEPS__QUOTED :=
|
||||
CC_DEPS__QUOTED :=
|
||||
ASM_UPPER_DEPS__QUOTED :=
|
||||
SV7A_DEPS__QUOTED :=
|
||||
S??_DEPS__QUOTED :=
|
||||
OBJS__QUOTED :=
|
||||
C67_DEPS__QUOTED :=
|
||||
K_DEPS__QUOTED :=
|
||||
S55_DEPS__QUOTED :=
|
||||
INO_DEPS__QUOTED :=
|
||||
C62_DEPS__QUOTED :=
|
||||
C_DEPS__QUOTED :=
|
||||
C_UPPER_DEPS__QUOTED :=
|
||||
C43_DEPS__QUOTED :=
|
||||
CPP_DEPS__QUOTED :=
|
||||
BIN_OUTPUTS__QUOTED :=
|
||||
C64_DEPS__QUOTED :=
|
||||
CXX_DEPS__QUOTED :=
|
||||
CLA_DEPS__QUOTED :=
|
||||
S_DEPS__QUOTED :=
|
||||
ASM_DEPS__QUOTED :=
|
||||
S43_DEPS__QUOTED :=
|
||||
EXE_OUTPUTS__QUOTED :=
|
||||
S64_DEPS__QUOTED :=
|
||||
S62_DEPS__QUOTED :=
|
||||
PDE_DEPS__QUOTED :=
|
||||
|
||||
# Every subdirectory with source files must be described here
|
||||
SUBDIRS := \
|
||||
. \
|
||||
|
15
CPE325/Lab5/Debug/subdir_rules.mk
Normal file
15
CPE325/Lab5/Debug/subdir_rules.mk
Normal file
@ -0,0 +1,15 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
################################################################################
|
||||
|
||||
SHELL = cmd.exe
|
||||
|
||||
# Each subdirectory must supply rules for building sources it contributes
|
||||
%.obj: ../%.asm $(GEN_OPTS) | $(GEN_FILES) $(GEN_MISC_FILES)
|
||||
@echo 'Building file: "$<"'
|
||||
@echo 'Invoking: MSP430 Compiler'
|
||||
"C:/ti/ccs1040/ccs/tools/compiler/ti-cgt-msp430_20.2.5.LTS/bin/cl430" -vmspx --code_model=small --data_model=small --use_hw_mpy=F5 --include_path="C:/ti/ccs1040/ccs/ccs_base/msp430/include" --include_path="C:/CPE325_Workspace/Lab5" --include_path="C:/ti/ccs1040/ccs/tools/compiler/ti-cgt-msp430_20.2.5.LTS/include" --advice:power=all --define=__MSP430F5529__ -g --printf_support=minimal --diag_warning=225 --diag_wrap=off --display_error_number --silicon_errata=CPU21 --silicon_errata=CPU22 --silicon_errata=CPU23 --silicon_errata=CPU40 --preproc_with_compile --preproc_dependency="$(basename $(<F)).d_raw" $(GEN_OPTS__FLAG) "$<"
|
||||
@echo 'Finished building: "$<"'
|
||||
@echo ' '
|
||||
|
||||
|
29
CPE325/Lab5/Debug/subdir_vars.mk
Normal file
29
CPE325/Lab5/Debug/subdir_vars.mk
Normal file
@ -0,0 +1,29 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
################################################################################
|
||||
|
||||
SHELL = cmd.exe
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
CMD_SRCS += \
|
||||
../lnk_msp430f5529.cmd
|
||||
|
||||
ASM_SRCS += \
|
||||
../main.asm
|
||||
|
||||
OBJS += \
|
||||
./main.obj
|
||||
|
||||
ASM_DEPS += \
|
||||
./main.d
|
||||
|
||||
OBJS__QUOTED += \
|
||||
"main.obj"
|
||||
|
||||
ASM_DEPS__QUOTED += \
|
||||
"main.d"
|
||||
|
||||
ASM_SRCS__QUOTED += \
|
||||
"../main.asm"
|
||||
|
||||
|
251
CPE325/Lab5/lnk_msp430f5529.cmd
Executable file
251
CPE325/Lab5/lnk_msp430f5529.cmd
Executable file
@ -0,0 +1,251 @@
|
||||
/* ============================================================================ */
|
||||
/* Copyright (c) 2020, Texas Instruments Incorporated */
|
||||
/* All rights reserved. */
|
||||
/* */
|
||||
/* Redistribution and use in source and binary forms, with or without */
|
||||
/* modification, are permitted provided that the following conditions */
|
||||
/* are met: */
|
||||
/* */
|
||||
/* * Redistributions of source code must retain the above copyright */
|
||||
/* notice, this list of conditions and the following disclaimer. */
|
||||
/* */
|
||||
/* * Redistributions in binary form must reproduce the above copyright */
|
||||
/* notice, this list of conditions and the following disclaimer in the */
|
||||
/* documentation and/or other materials provided with the distribution. */
|
||||
/* */
|
||||
/* * Neither the name of Texas Instruments Incorporated nor the names of */
|
||||
/* its contributors may be used to endorse or promote products derived */
|
||||
/* from this software without specific prior written permission. */
|
||||
/* */
|
||||
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
|
||||
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
|
||||
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
|
||||
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
|
||||
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
|
||||
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
|
||||
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
|
||||
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
|
||||
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
|
||||
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
|
||||
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
|
||||
/* ============================================================================ */
|
||||
|
||||
/******************************************************************************/
|
||||
/* lnk_msp430f5529.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5529 PROGRAMS */
|
||||
/* */
|
||||
/* Usage: lnk430 <obj files...> -o <out file> -m <map file> lnk.cmd */
|
||||
/* cl430 <src files...> -z -o <out file> -m <map file> lnk.cmd */
|
||||
/* */
|
||||
/*----------------------------------------------------------------------------*/
|
||||
/* These linker options are for command line linking only. For IDE linking, */
|
||||
/* you should set your linker options in Project Properties */
|
||||
/* -c LINK USING C CONVENTIONS */
|
||||
/* -stack 0x0100 SOFTWARE STACK SIZE */
|
||||
/* -heap 0x0100 HEAP AREA SIZE */
|
||||
/* */
|
||||
/*----------------------------------------------------------------------------*/
|
||||
/* Version: 1.211 */
|
||||
/*----------------------------------------------------------------------------*/
|
||||
|
||||
/****************************************************************************/
|
||||
/* Specify the system memory map */
|
||||
/****************************************************************************/
|
||||
|
||||
MEMORY
|
||||
{
|
||||
SFR : origin = 0x0000, length = 0x0010
|
||||
PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0
|
||||
PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100
|
||||
RAM : origin = 0x2400, length = 0x2000
|
||||
USBRAM : origin = 0x1C00, length = 0x0800
|
||||
INFOA : origin = 0x1980, length = 0x0080
|
||||
INFOB : origin = 0x1900, length = 0x0080
|
||||
INFOC : origin = 0x1880, length = 0x0080
|
||||
INFOD : origin = 0x1800, length = 0x0080
|
||||
FLASH : origin = 0x4400, length = 0xBB80
|
||||
FLASH2 : origin = 0x10000,length = 0x143F8 /* Boundaries changed to fix CPU47 */
|
||||
INT00 : origin = 0xFF80, length = 0x0002
|
||||
INT01 : origin = 0xFF82, length = 0x0002
|
||||
INT02 : origin = 0xFF84, length = 0x0002
|
||||
INT03 : origin = 0xFF86, length = 0x0002
|
||||
INT04 : origin = 0xFF88, length = 0x0002
|
||||
INT05 : origin = 0xFF8A, length = 0x0002
|
||||
INT06 : origin = 0xFF8C, length = 0x0002
|
||||
INT07 : origin = 0xFF8E, length = 0x0002
|
||||
INT08 : origin = 0xFF90, length = 0x0002
|
||||
INT09 : origin = 0xFF92, length = 0x0002
|
||||
INT10 : origin = 0xFF94, length = 0x0002
|
||||
INT11 : origin = 0xFF96, length = 0x0002
|
||||
INT12 : origin = 0xFF98, length = 0x0002
|
||||
INT13 : origin = 0xFF9A, length = 0x0002
|
||||
INT14 : origin = 0xFF9C, length = 0x0002
|
||||
INT15 : origin = 0xFF9E, length = 0x0002
|
||||
INT16 : origin = 0xFFA0, length = 0x0002
|
||||
INT17 : origin = 0xFFA2, length = 0x0002
|
||||
INT18 : origin = 0xFFA4, length = 0x0002
|
||||
INT19 : origin = 0xFFA6, length = 0x0002
|
||||
INT20 : origin = 0xFFA8, length = 0x0002
|
||||
INT21 : origin = 0xFFAA, length = 0x0002
|
||||
INT22 : origin = 0xFFAC, length = 0x0002
|
||||
INT23 : origin = 0xFFAE, length = 0x0002
|
||||
INT24 : origin = 0xFFB0, length = 0x0002
|
||||
INT25 : origin = 0xFFB2, length = 0x0002
|
||||
INT26 : origin = 0xFFB4, length = 0x0002
|
||||
INT27 : origin = 0xFFB6, length = 0x0002
|
||||
INT28 : origin = 0xFFB8, length = 0x0002
|
||||
INT29 : origin = 0xFFBA, length = 0x0002
|
||||
INT30 : origin = 0xFFBC, length = 0x0002
|
||||
INT31 : origin = 0xFFBE, length = 0x0002
|
||||
INT32 : origin = 0xFFC0, length = 0x0002
|
||||
INT33 : origin = 0xFFC2, length = 0x0002
|
||||
INT34 : origin = 0xFFC4, length = 0x0002
|
||||
INT35 : origin = 0xFFC6, length = 0x0002
|
||||
INT36 : origin = 0xFFC8, length = 0x0002
|
||||
INT37 : origin = 0xFFCA, length = 0x0002
|
||||
INT38 : origin = 0xFFCC, length = 0x0002
|
||||
INT39 : origin = 0xFFCE, length = 0x0002
|
||||
INT40 : origin = 0xFFD0, length = 0x0002
|
||||
INT41 : origin = 0xFFD2, length = 0x0002
|
||||
INT42 : origin = 0xFFD4, length = 0x0002
|
||||
INT43 : origin = 0xFFD6, length = 0x0002
|
||||
INT44 : origin = 0xFFD8, length = 0x0002
|
||||
INT45 : origin = 0xFFDA, length = 0x0002
|
||||
INT46 : origin = 0xFFDC, length = 0x0002
|
||||
INT47 : origin = 0xFFDE, length = 0x0002
|
||||
INT48 : origin = 0xFFE0, length = 0x0002
|
||||
INT49 : origin = 0xFFE2, length = 0x0002
|
||||
INT50 : origin = 0xFFE4, length = 0x0002
|
||||
INT51 : origin = 0xFFE6, length = 0x0002
|
||||
INT52 : origin = 0xFFE8, length = 0x0002
|
||||
INT53 : origin = 0xFFEA, length = 0x0002
|
||||
INT54 : origin = 0xFFEC, length = 0x0002
|
||||
INT55 : origin = 0xFFEE, length = 0x0002
|
||||
INT56 : origin = 0xFFF0, length = 0x0002
|
||||
INT57 : origin = 0xFFF2, length = 0x0002
|
||||
INT58 : origin = 0xFFF4, length = 0x0002
|
||||
INT59 : origin = 0xFFF6, length = 0x0002
|
||||
INT60 : origin = 0xFFF8, length = 0x0002
|
||||
INT61 : origin = 0xFFFA, length = 0x0002
|
||||
INT62 : origin = 0xFFFC, length = 0x0002
|
||||
RESET : origin = 0xFFFE, length = 0x0002
|
||||
}
|
||||
|
||||
/****************************************************************************/
|
||||
/* Specify the sections allocation into memory */
|
||||
/****************************************************************************/
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.bss : {} > RAM /* Global & static vars */
|
||||
.data : {} > RAM /* Global & static vars */
|
||||
.TI.noinit : {} > RAM /* For #pragma noinit */
|
||||
.sysmem : {} > RAM /* Dynamic memory allocation area */
|
||||
.stack : {} > RAM (HIGH) /* Software system stack */
|
||||
|
||||
#ifndef __LARGE_CODE_MODEL__
|
||||
.text : {} > FLASH /* Code */
|
||||
#else
|
||||
.text : {} >> FLASH2 | FLASH /* Code */
|
||||
#endif
|
||||
.text:_isr : {} > FLASH /* ISR Code space */
|
||||
.cinit : {} > FLASH /* Initialization tables */
|
||||
#ifndef __LARGE_DATA_MODEL__
|
||||
.const : {} > FLASH /* Constant data */
|
||||
#else
|
||||
.const : {} >> FLASH | FLASH2 /* Constant data */
|
||||
#endif
|
||||
.cio : {} > RAM /* C I/O Buffer */
|
||||
|
||||
.pinit : {} > FLASH /* C++ Constructor tables */
|
||||
.binit : {} > FLASH /* Boot-time Initialization tables */
|
||||
.init_array : {} > FLASH /* C++ Constructor tables */
|
||||
.mspabi.exidx : {} > FLASH /* C++ Constructor tables */
|
||||
.mspabi.extab : {} > FLASH /* C++ Constructor tables */
|
||||
#ifdef __TI_COMPILER_VERSION__
|
||||
#if __TI_COMPILER_VERSION__ >= 15009000
|
||||
#ifndef __LARGE_CODE_MODEL__
|
||||
.TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT)
|
||||
#else
|
||||
.TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT)
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
.infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */
|
||||
.infoB : {} > INFOB
|
||||
.infoC : {} > INFOC
|
||||
.infoD : {} > INFOD
|
||||
|
||||
/* MSP430 Interrupt vectors */
|
||||
.int00 : {} > INT00
|
||||
.int01 : {} > INT01
|
||||
.int02 : {} > INT02
|
||||
.int03 : {} > INT03
|
||||
.int04 : {} > INT04
|
||||
.int05 : {} > INT05
|
||||
.int06 : {} > INT06
|
||||
.int07 : {} > INT07
|
||||
.int08 : {} > INT08
|
||||
.int09 : {} > INT09
|
||||
.int10 : {} > INT10
|
||||
.int11 : {} > INT11
|
||||
.int12 : {} > INT12
|
||||
.int13 : {} > INT13
|
||||
.int14 : {} > INT14
|
||||
.int15 : {} > INT15
|
||||
.int16 : {} > INT16
|
||||
.int17 : {} > INT17
|
||||
.int18 : {} > INT18
|
||||
.int19 : {} > INT19
|
||||
.int20 : {} > INT20
|
||||
.int21 : {} > INT21
|
||||
.int22 : {} > INT22
|
||||
.int23 : {} > INT23
|
||||
.int24 : {} > INT24
|
||||
.int25 : {} > INT25
|
||||
.int26 : {} > INT26
|
||||
.int27 : {} > INT27
|
||||
.int28 : {} > INT28
|
||||
.int29 : {} > INT29
|
||||
.int30 : {} > INT30
|
||||
.int31 : {} > INT31
|
||||
.int32 : {} > INT32
|
||||
.int33 : {} > INT33
|
||||
.int34 : {} > INT34
|
||||
.int35 : {} > INT35
|
||||
.int36 : {} > INT36
|
||||
.int37 : {} > INT37
|
||||
.int38 : {} > INT38
|
||||
.int39 : {} > INT39
|
||||
.int40 : {} > INT40
|
||||
RTC : { * ( .int41 ) } > INT41 type = VECT_INIT
|
||||
PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT
|
||||
TIMER2_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT
|
||||
TIMER2_A0 : { * ( .int44 ) } > INT44 type = VECT_INIT
|
||||
USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT
|
||||
USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT
|
||||
PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT
|
||||
TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT
|
||||
TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT
|
||||
DMA : { * ( .int50 ) } > INT50 type = VECT_INIT
|
||||
USB_UBM : { * ( .int51 ) } > INT51 type = VECT_INIT
|
||||
TIMER0_A1 : { * ( .int52 ) } > INT52 type = VECT_INIT
|
||||
TIMER0_A0 : { * ( .int53 ) } > INT53 type = VECT_INIT
|
||||
ADC12 : { * ( .int54 ) } > INT54 type = VECT_INIT
|
||||
USCI_B0 : { * ( .int55 ) } > INT55 type = VECT_INIT
|
||||
USCI_A0 : { * ( .int56 ) } > INT56 type = VECT_INIT
|
||||
WDT : { * ( .int57 ) } > INT57 type = VECT_INIT
|
||||
TIMER0_B1 : { * ( .int58 ) } > INT58 type = VECT_INIT
|
||||
TIMER0_B0 : { * ( .int59 ) } > INT59 type = VECT_INIT
|
||||
COMP_B : { * ( .int60 ) } > INT60 type = VECT_INIT
|
||||
UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT
|
||||
SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT
|
||||
.reset : {} > RESET /* MSP430 Reset vector */
|
||||
}
|
||||
|
||||
/****************************************************************************/
|
||||
/* Include peripherals memory map */
|
||||
/****************************************************************************/
|
||||
|
||||
-l msp430f5529.cmd
|
||||
|
76
CPE325/Lab5/main.asm
Normal file
76
CPE325/Lab5/main.asm
Normal file
@ -0,0 +1,76 @@
|
||||
;-------------------------------------------------------------------------------
|
||||
; MSP430 Assembler Code Template for use with TI Code Composer Studio
|
||||
;
|
||||
;
|
||||
;-------------------------------------------------------------------------------
|
||||
.cdecls C,LIST,"msp430.h" ; Include device header file
|
||||
|
||||
;-------------------------------------------------------------------------------
|
||||
.def RESET ; Export program entry-point to
|
||||
; make it known to linker.
|
||||
.data
|
||||
arr: .int "-25", "5", "22", "8", "-6", "14"
|
||||
arrSize .int "6"
|
||||
;-------------------------------------------------------------------------------
|
||||
.text ; Assemble into program memory.
|
||||
.retain ; Override ELF conditional linking
|
||||
; and retain current section.
|
||||
.retainrefs ; And retain any sections that have
|
||||
; references to current section.
|
||||
|
||||
;-------------------------------------------------------------------------------
|
||||
RESET mov.w #__STACK_END,SP ; Initialize stackpointer
|
||||
StopWDT mov.w #WDTPW|WDTHOLD,&WDTCTL ; Stop watchdog timer
|
||||
|
||||
|
||||
;-------------------------------------------------------------------------------
|
||||
; Main loop here
|
||||
;-------------------------------------------------------------------------------
|
||||
main: push #arr ; Move the starting address of arr onto the stack
|
||||
push #arraySize ; Push the arraySize onto the stack
|
||||
call #SW_Mult
|
||||
mov.w @SP, #6
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
SW_Mult: push R7 ; save r7, the sum
|
||||
push R6 ; save R6, array size
|
||||
push r4 ; save r4, pointer to array
|
||||
mov.w 10(SP), R6 ; retreive array size
|
||||
mov.w 12(SP, R7 ; retreive starting address
|
||||
clr.w r8
|
||||
clr.w r9
|
||||
addIndex: mov.w @r4+, r5 ; increment byte counter
|
||||
jmp comp
|
||||
|
||||
comp: cmp #0, r5
|
||||
clr.w r8 ; clear result
|
||||
jl ext
|
||||
sum2 cmp #16, r10
|
||||
jz step2
|
||||
; sxt r5 ; sign-extend value
|
||||
|
||||
ext: sxt r5 ; sign-extend value
|
||||
jmp sum2
|
||||
step2: add
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
;-------------------------------------------------------------------------------
|
||||
; Stack Pointer definition
|
||||
;-------------------------------------------------------------------------------
|
||||
.global __STACK_END
|
||||
.sect .stack
|
||||
|
||||
|
||||
;-------------------------------------------------------------------------------
|
||||
; Interrupt Vectors
|
||||
;-------------------------------------------------------------------------------
|
||||
.sect ".reset" ; MSP430 RESET Vector
|
||||
.short RESET
|
||||
|
12
CPE325/Lab5/targetConfigs/MSP430F5529.ccxml
Normal file
12
CPE325/Lab5/targetConfigs/MSP430F5529.ccxml
Normal file
@ -0,0 +1,12 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<configurations XML_version="1.2" id="configurations_0">
|
||||
<configuration XML_version="1.2" id="configuration_0">
|
||||
<instance XML_version="1.2" desc="TI MSP430 USB1" href="connections/TIMSP430-USB.xml" id="TI MSP430 USB1" xml="TIMSP430-USB.xml" xmlpath="connections"/>
|
||||
<connection XML_version="1.2" id="TI MSP430 USB1">
|
||||
<instance XML_version="1.2" href="drivers/msp430_emu.xml" id="drivers" xml="msp430_emu.xml" xmlpath="drivers"/>
|
||||
<platform XML_version="1.2" id="platform_0">
|
||||
<instance XML_version="1.2" desc="MSP430F5529" href="devices/MSP430F5529.xml" id="MSP430F5529" xml="MSP430F5529.xml" xmlpath="devices"/>
|
||||
</platform>
|
||||
</connection>
|
||||
</configuration>
|
||||
</configurations>
|
9
CPE325/Lab5/targetConfigs/readme.txt
Normal file
9
CPE325/Lab5/targetConfigs/readme.txt
Normal file
@ -0,0 +1,9 @@
|
||||
The 'targetConfigs' folder contains target-configuration (.ccxml) files, automatically generated based
|
||||
on the device and connection settings specified in your project on the Properties > General page.
|
||||
|
||||
Please note that in automatic target-configuration management, changes to the project's device and/or
|
||||
connection settings will either modify an existing or generate a new target-configuration file. Thus,
|
||||
if you manually edit these auto-generated files, you may need to re-apply your changes. Alternatively,
|
||||
you may create your own target-configuration file for this project and manage it manually. You can
|
||||
always switch back to automatic target-configuration management by checking the "Manage the project's
|
||||
target-configuration automatically" checkbox on the project's Properties > General page.
|
Reference in New Issue
Block a user