added more code
This commit is contained in:
Andrew W
750
CPE325/Lab6_Problem2/Debug/Lab6_Problem2.map
Normal file
750
CPE325/Lab6_Problem2/Debug/Lab6_Problem2.map
Normal file
@ -0,0 +1,750 @@
|
||||
******************************************************************************
|
||||
MSP430 Linker PC v20.2.5
|
||||
******************************************************************************
|
||||
>> Linked Thu Dec 2 20:38:06 2021
|
||||
|
||||
OUTPUT FILE NAME: <Lab6_Problem2.out>
|
||||
ENTRY POINT SYMBOL: "_c_int00_noinit_noargs" address: 000031b0
|
||||
|
||||
|
||||
MEMORY CONFIGURATION
|
||||
|
||||
name origin length used unused attr fill
|
||||
---------------------- -------- --------- -------- -------- ---- --------
|
||||
SFR 00000000 00000010 00000000 00000010 RWIX
|
||||
PERIPHERALS_8BIT 00000010 000000f0 00000000 000000f0 RWIX
|
||||
PERIPHERALS_16BIT 00000100 00000100 00000000 00000100 RWIX
|
||||
INFOB 00001000 00000080 00000000 00000080 RWIX
|
||||
INFOA 00001080 00000080 00000000 00000080 RWIX
|
||||
RAM 00001100 00002000 00000050 00001fb0 RWIX
|
||||
FLASH 00003100 0000cebe 000000d6 0000cde8 RWIX
|
||||
BSLSIGNATURE 0000ffbe 00000002 00000002 00000000 RWIX ffff
|
||||
INT00 0000ffc0 00000002 00000000 00000002 RWIX
|
||||
INT01 0000ffc2 00000002 00000000 00000002 RWIX
|
||||
INT02 0000ffc4 00000002 00000000 00000002 RWIX
|
||||
INT03 0000ffc6 00000002 00000000 00000002 RWIX
|
||||
INT04 0000ffc8 00000002 00000000 00000002 RWIX
|
||||
INT05 0000ffca 00000002 00000000 00000002 RWIX
|
||||
INT06 0000ffcc 00000002 00000000 00000002 RWIX
|
||||
INT07 0000ffce 00000002 00000000 00000002 RWIX
|
||||
INT08 0000ffd0 00000002 00000000 00000002 RWIX
|
||||
INT09 0000ffd2 00000002 00000000 00000002 RWIX
|
||||
INT10 0000ffd4 00000002 00000000 00000002 RWIX
|
||||
INT11 0000ffd6 00000002 00000000 00000002 RWIX
|
||||
INT12 0000ffd8 00000002 00000000 00000002 RWIX
|
||||
INT13 0000ffda 00000002 00000000 00000002 RWIX
|
||||
INT14 0000ffdc 00000002 00000002 00000000 RWIX
|
||||
INT15 0000ffde 00000002 00000002 00000000 RWIX
|
||||
INT16 0000ffe0 00000002 00000002 00000000 RWIX
|
||||
INT17 0000ffe2 00000002 00000002 00000000 RWIX
|
||||
INT18 0000ffe4 00000002 00000002 00000000 RWIX
|
||||
INT19 0000ffe6 00000002 00000002 00000000 RWIX
|
||||
INT20 0000ffe8 00000002 00000002 00000000 RWIX
|
||||
INT21 0000ffea 00000002 00000002 00000000 RWIX
|
||||
INT22 0000ffec 00000002 00000002 00000000 RWIX
|
||||
INT23 0000ffee 00000002 00000002 00000000 RWIX
|
||||
INT24 0000fff0 00000002 00000002 00000000 RWIX
|
||||
INT25 0000fff2 00000002 00000002 00000000 RWIX
|
||||
INT26 0000fff4 00000002 00000002 00000000 RWIX
|
||||
INT27 0000fff6 00000002 00000002 00000000 RWIX
|
||||
INT28 0000fff8 00000002 00000002 00000000 RWIX
|
||||
INT29 0000fffa 00000002 00000002 00000000 RWIX
|
||||
INT30 0000fffc 00000002 00000002 00000000 RWIX
|
||||
RESET 0000fffe 00000002 00000002 00000000 RWIX
|
||||
FLASH2 00010000 00010000 00000000 00010000 RWIX
|
||||
|
||||
|
||||
SECTION ALLOCATION MAP
|
||||
|
||||
output attributes/
|
||||
section page origin length input sections
|
||||
-------- ---- ---------- ---------- ----------------
|
||||
.stack 0 000030b0 00000050 UNINITIALIZED
|
||||
000030b0 00000002 rts430_eabi.lib : boot.c.obj (.stack)
|
||||
000030b2 0000004e --HOLE--
|
||||
|
||||
.text 0 00003100 000000ce
|
||||
00003100 0000005c main.obj (.text:main)
|
||||
0000315c 00000054 main.obj (.text:Port1_ISR)
|
||||
000031b0 00000014 rts430_eabi.lib : boot.c.obj (.text:_c_int00_noinit_noargs)
|
||||
000031c4 00000006 : exit.c.obj (.text:abort)
|
||||
000031ca 00000004 : pre_init.c.obj (.text:_system_pre_init)
|
||||
|
||||
.text:_isr
|
||||
* 0 000031ce 00000008
|
||||
000031ce 00000008 rts430_eabi.lib : isr_trap.asm.obj (.text:_isr:__TI_ISR_TRAP)
|
||||
|
||||
.cinit 0 00003100 00000000 UNINITIALIZED
|
||||
|
||||
.binit 0 00003100 00000000
|
||||
|
||||
.init_array
|
||||
* 0 00003100 00000000 UNINITIALIZED
|
||||
|
||||
DAC12 0 0000ffdc 00000002
|
||||
0000ffdc 00000002 rts430_eabi.lib : int14.asm.obj (.int14)
|
||||
|
||||
DMA 0 0000ffde 00000002
|
||||
0000ffde 00000002 rts430_eabi.lib : int15.asm.obj (.int15)
|
||||
|
||||
BASICTIMER
|
||||
* 0 0000ffe0 00000002
|
||||
0000ffe0 00000002 rts430_eabi.lib : int16.asm.obj (.int16)
|
||||
|
||||
PORT2 0 0000ffe2 00000002
|
||||
0000ffe2 00000002 rts430_eabi.lib : int17.asm.obj (.int17)
|
||||
|
||||
USART1TX 0 0000ffe4 00000002
|
||||
0000ffe4 00000002 rts430_eabi.lib : int18.asm.obj (.int18)
|
||||
|
||||
USART1RX 0 0000ffe6 00000002
|
||||
0000ffe6 00000002 rts430_eabi.lib : int19.asm.obj (.int19)
|
||||
|
||||
PORT1 0 0000ffe8 00000002
|
||||
0000ffe8 00000002 main.obj (.int20)
|
||||
|
||||
TIMERA1 0 0000ffea 00000002
|
||||
0000ffea 00000002 rts430_eabi.lib : int21.asm.obj (.int21)
|
||||
|
||||
TIMERA0 0 0000ffec 00000002
|
||||
0000ffec 00000002 rts430_eabi.lib : int22.asm.obj (.int22)
|
||||
|
||||
ADC12 0 0000ffee 00000002
|
||||
0000ffee 00000002 rts430_eabi.lib : int23.asm.obj (.int23)
|
||||
|
||||
USCIAB0TX
|
||||
* 0 0000fff0 00000002
|
||||
0000fff0 00000002 rts430_eabi.lib : int24.asm.obj (.int24)
|
||||
|
||||
USCIAB0RX
|
||||
* 0 0000fff2 00000002
|
||||
0000fff2 00000002 rts430_eabi.lib : int25.asm.obj (.int25)
|
||||
|
||||
WDT 0 0000fff4 00000002
|
||||
0000fff4 00000002 rts430_eabi.lib : int26.asm.obj (.int26)
|
||||
|
||||
COMPARATORA
|
||||
* 0 0000fff6 00000002
|
||||
0000fff6 00000002 rts430_eabi.lib : int27.asm.obj (.int27)
|
||||
|
||||
TIMERB1 0 0000fff8 00000002
|
||||
0000fff8 00000002 rts430_eabi.lib : int28.asm.obj (.int28)
|
||||
|
||||
TIMERB0 0 0000fffa 00000002
|
||||
0000fffa 00000002 rts430_eabi.lib : int29.asm.obj (.int29)
|
||||
|
||||
NMI 0 0000fffc 00000002
|
||||
0000fffc 00000002 rts430_eabi.lib : int30.asm.obj (.int30)
|
||||
|
||||
.reset 0 0000fffe 00000002
|
||||
0000fffe 00000002 rts430_eabi.lib : boot.c.obj (.reset)
|
||||
|
||||
$fill000 0 0000ffbe 00000002
|
||||
0000ffbe 00000002 --HOLE-- [fill = ffff]
|
||||
|
||||
MODULE SUMMARY
|
||||
|
||||
Module code ro data rw data
|
||||
------ ---- ------- -------
|
||||
.\
|
||||
main.obj 176 2 0
|
||||
+--+------------------+------+---------+---------+
|
||||
Total: 176 2 0
|
||||
|
||||
C:\ti\ccs1040\ccs\tools\compiler\ti-cgt-msp430_20.2.5.LTS\lib\rts430_eabi.lib
|
||||
boot.c.obj 20 2 0
|
||||
isr_trap.asm.obj 8 0 0
|
||||
exit.c.obj 6 0 0
|
||||
pre_init.c.obj 4 0 0
|
||||
int14.asm.obj 0 2 0
|
||||
int15.asm.obj 0 2 0
|
||||
int16.asm.obj 0 2 0
|
||||
int17.asm.obj 0 2 0
|
||||
int18.asm.obj 0 2 0
|
||||
int19.asm.obj 0 2 0
|
||||
int21.asm.obj 0 2 0
|
||||
int22.asm.obj 0 2 0
|
||||
int23.asm.obj 0 2 0
|
||||
int24.asm.obj 0 2 0
|
||||
int25.asm.obj 0 2 0
|
||||
int26.asm.obj 0 2 0
|
||||
int27.asm.obj 0 2 0
|
||||
int28.asm.obj 0 2 0
|
||||
int29.asm.obj 0 2 0
|
||||
int30.asm.obj 0 2 0
|
||||
+--+------------------+------+---------+---------+
|
||||
Total: 38 34 0
|
||||
|
||||
Stack: 0 0 80
|
||||
+--+------------------+------+---------+---------+
|
||||
Grand Total: 214 36 80
|
||||
|
||||
|
||||
GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name
|
||||
|
||||
address name
|
||||
------- ----
|
||||
000001a0 ADC12CTL0
|
||||
000001a2 ADC12CTL1
|
||||
000001a6 ADC12IE
|
||||
000001a4 ADC12IFG
|
||||
000001a8 ADC12IV
|
||||
00000080 ADC12MCTL0
|
||||
00000081 ADC12MCTL1
|
||||
0000008a ADC12MCTL10
|
||||
0000008b ADC12MCTL11
|
||||
0000008c ADC12MCTL12
|
||||
0000008d ADC12MCTL13
|
||||
0000008e ADC12MCTL14
|
||||
0000008f ADC12MCTL15
|
||||
00000082 ADC12MCTL2
|
||||
00000083 ADC12MCTL3
|
||||
00000084 ADC12MCTL4
|
||||
00000085 ADC12MCTL5
|
||||
00000086 ADC12MCTL6
|
||||
00000087 ADC12MCTL7
|
||||
00000088 ADC12MCTL8
|
||||
00000089 ADC12MCTL9
|
||||
00000140 ADC12MEM0
|
||||
00000142 ADC12MEM1
|
||||
00000154 ADC12MEM10
|
||||
00000156 ADC12MEM11
|
||||
00000158 ADC12MEM12
|
||||
0000015a ADC12MEM13
|
||||
0000015c ADC12MEM14
|
||||
0000015e ADC12MEM15
|
||||
00000144 ADC12MEM2
|
||||
00000146 ADC12MEM3
|
||||
00000148 ADC12MEM4
|
||||
0000014a ADC12MEM5
|
||||
0000014c ADC12MEM6
|
||||
0000014e ADC12MEM7
|
||||
00000150 ADC12MEM8
|
||||
00000152 ADC12MEM9
|
||||
00000046 BTCNT1
|
||||
00000046 BTCNT12
|
||||
00000047 BTCNT2
|
||||
00000040 BTCTL
|
||||
000031c4 C$$EXIT
|
||||
00000059 CACTL1
|
||||
0000005a CACTL2
|
||||
0000005b CAPD
|
||||
000001c0 DAC12_0CTL
|
||||
000001c8 DAC12_0DAT
|
||||
000001c2 DAC12_1CTL
|
||||
000001ca DAC12_1DAT
|
||||
000001d0 DMA0CTL
|
||||
000001d6 DMA0DA
|
||||
000001d6 DMA0DAL
|
||||
000001d2 DMA0SA
|
||||
000001d2 DMA0SAL
|
||||
000001da DMA0SZ
|
||||
000001dc DMA1CTL
|
||||
000001e2 DMA1DA
|
||||
000001e2 DMA1DAL
|
||||
000001de DMA1SA
|
||||
000001de DMA1SAL
|
||||
000001e6 DMA1SZ
|
||||
000001e8 DMA2CTL
|
||||
000001ee DMA2DA
|
||||
000001ee DMA2DAL
|
||||
000001ea DMA2SA
|
||||
000001ea DMA2SAL
|
||||
000001f2 DMA2SZ
|
||||
00000122 DMACTL0
|
||||
00000124 DMACTL1
|
||||
00000126 DMAIV
|
||||
00000128 FCTL1
|
||||
0000012a FCTL2
|
||||
0000012c FCTL3
|
||||
00000053 FLL_CTL0
|
||||
00000054 FLL_CTL1
|
||||
00000000 IE1
|
||||
00000001 IE2
|
||||
00000002 IFG1
|
||||
00000003 IFG2
|
||||
00000090 LCDACTL
|
||||
000000ac LCDAPCTL0
|
||||
000000ad LCDAPCTL1
|
||||
000000ae LCDAVCTL0
|
||||
000000af LCDAVCTL1
|
||||
00000091 LCDM1
|
||||
0000009a LCDM10
|
||||
0000009b LCDM11
|
||||
0000009c LCDM12
|
||||
0000009d LCDM13
|
||||
0000009e LCDM14
|
||||
0000009f LCDM15
|
||||
000000a0 LCDM16
|
||||
000000a1 LCDM17
|
||||
000000a2 LCDM18
|
||||
000000a3 LCDM19
|
||||
00000092 LCDM2
|
||||
000000a4 LCDM20
|
||||
00000093 LCDM3
|
||||
00000094 LCDM4
|
||||
00000095 LCDM5
|
||||
00000096 LCDM6
|
||||
00000097 LCDM7
|
||||
00000098 LCDM8
|
||||
00000099 LCDM9
|
||||
00000134 MAC
|
||||
00000136 MACS
|
||||
00000005 ME2
|
||||
00000130 MPY
|
||||
00000132 MPYS
|
||||
000000c0 OA0CTL0
|
||||
000000c1 OA0CTL1
|
||||
000000c2 OA1CTL0
|
||||
000000c3 OA1CTL1
|
||||
000000c4 OA2CTL0
|
||||
000000c5 OA2CTL1
|
||||
00000138 OP2
|
||||
0000000d P10DIR
|
||||
00000009 P10IN
|
||||
0000000b P10OUT
|
||||
0000000f P10SEL
|
||||
00000022 P1DIR
|
||||
00000025 P1IE
|
||||
00000024 P1IES
|
||||
00000023 P1IFG
|
||||
00000020 P1IN
|
||||
00000021 P1OUT
|
||||
00000026 P1SEL
|
||||
0000002a P2DIR
|
||||
0000002d P2IE
|
||||
0000002c P2IES
|
||||
0000002b P2IFG
|
||||
00000028 P2IN
|
||||
00000029 P2OUT
|
||||
0000002e P2SEL
|
||||
0000001a P3DIR
|
||||
00000018 P3IN
|
||||
00000019 P3OUT
|
||||
0000001b P3SEL
|
||||
0000001e P4DIR
|
||||
0000001c P4IN
|
||||
0000001d P4OUT
|
||||
0000001f P4SEL
|
||||
00000032 P5DIR
|
||||
00000030 P5IN
|
||||
00000031 P5OUT
|
||||
00000033 P5SEL
|
||||
00000036 P6DIR
|
||||
00000034 P6IN
|
||||
00000035 P6OUT
|
||||
00000037 P6SEL
|
||||
0000003c P7DIR
|
||||
00000038 P7IN
|
||||
0000003a P7OUT
|
||||
0000003e P7SEL
|
||||
0000003d P8DIR
|
||||
00000039 P8IN
|
||||
0000003b P8OUT
|
||||
0000003f P8SEL
|
||||
0000000c P9DIR
|
||||
00000008 P9IN
|
||||
0000000a P9OUT
|
||||
0000000e P9SEL
|
||||
0000003c PADIR
|
||||
00000038 PAIN
|
||||
0000003a PAOUT
|
||||
0000003e PASEL
|
||||
0000000c PBDIR
|
||||
00000008 PBIN
|
||||
0000000a PBOUT
|
||||
0000000e PBSEL
|
||||
0000315c Port1_ISR
|
||||
0000013c RESHI
|
||||
0000013a RESLO
|
||||
00000041 RTCCTL
|
||||
0000004c RTCDATE
|
||||
0000004c RTCDAY
|
||||
0000004d RTCMON
|
||||
00000042 RTCNT1
|
||||
00000043 RTCNT2
|
||||
00000044 RTCNT3
|
||||
00000045 RTCNT4
|
||||
00000042 RTCTIM0
|
||||
00000044 RTCTIM1
|
||||
00000040 RTCTL
|
||||
0000004e RTCYEAR
|
||||
0000004f RTCYEARH
|
||||
0000004e RTCYEARL
|
||||
00000050 SCFI0
|
||||
00000051 SCFI1
|
||||
00000052 SCFQCTL
|
||||
0000013e SUMEXT
|
||||
00000056 SVSCTL
|
||||
00000172 TACCR0
|
||||
00000174 TACCR1
|
||||
00000176 TACCR2
|
||||
00000162 TACCTL0
|
||||
00000164 TACCTL1
|
||||
00000166 TACCTL2
|
||||
00000160 TACTL
|
||||
0000012e TAIV
|
||||
00000170 TAR
|
||||
00000192 TBCCR0
|
||||
00000194 TBCCR1
|
||||
00000196 TBCCR2
|
||||
00000198 TBCCR3
|
||||
0000019a TBCCR4
|
||||
0000019c TBCCR5
|
||||
0000019e TBCCR6
|
||||
00000182 TBCCTL0
|
||||
00000184 TBCCTL1
|
||||
00000186 TBCCTL2
|
||||
00000188 TBCCTL3
|
||||
0000018a TBCCTL4
|
||||
0000018c TBCCTL5
|
||||
0000018e TBCCTL6
|
||||
00000180 TBCTL
|
||||
0000011e TBIV
|
||||
00000190 TBR
|
||||
0000007c U1BR0
|
||||
0000007d U1BR1
|
||||
00000078 U1CTL
|
||||
0000007b U1MCTL
|
||||
0000007a U1RCTL
|
||||
0000007e U1RXBUF
|
||||
00000079 U1TCTL
|
||||
0000007f U1TXBUF
|
||||
0000005d UCA0ABCTL
|
||||
00000062 UCA0BR0
|
||||
00000063 UCA0BR1
|
||||
00000060 UCA0CTL0
|
||||
00000061 UCA0CTL1
|
||||
0000005f UCA0IRRCTL
|
||||
0000005e UCA0IRTCTL
|
||||
00000064 UCA0MCTL
|
||||
00000066 UCA0RXBUF
|
||||
00000065 UCA0STAT
|
||||
00000067 UCA0TXBUF
|
||||
0000006a UCB0BR0
|
||||
0000006b UCB0BR1
|
||||
00000068 UCB0CTL0
|
||||
00000069 UCB0CTL1
|
||||
0000006c UCB0I2CIE
|
||||
00000118 UCB0I2COA
|
||||
0000011a UCB0I2CSA
|
||||
0000006e UCB0RXBUF
|
||||
0000006d UCB0STAT
|
||||
0000006f UCB0TXBUF
|
||||
00000120 WDTCTL
|
||||
00003100 __STACK_END
|
||||
00000050 __STACK_SIZE
|
||||
000031ce __TI_ISR_TRAP
|
||||
0000ffdc __TI_int14
|
||||
0000ffde __TI_int15
|
||||
0000ffe0 __TI_int16
|
||||
0000ffe2 __TI_int17
|
||||
0000ffe4 __TI_int18
|
||||
0000ffe6 __TI_int19
|
||||
0000ffe8 __TI_int20
|
||||
0000ffea __TI_int21
|
||||
0000ffec __TI_int22
|
||||
0000ffee __TI_int23
|
||||
0000fff0 __TI_int24
|
||||
0000fff2 __TI_int25
|
||||
0000fff4 __TI_int26
|
||||
0000fff6 __TI_int27
|
||||
0000fff8 __TI_int28
|
||||
0000fffa __TI_int29
|
||||
0000fffc __TI_int30
|
||||
ffffffff __TI_pprof_out_hndl
|
||||
ffffffff __TI_prof_data_size
|
||||
ffffffff __TI_prof_data_start
|
||||
ffffffff __c_args__
|
||||
000031b0 _c_int00_noinit_noargs
|
||||
0000fffe _reset_vector
|
||||
000030b0 _stack
|
||||
000031ca _system_pre_init
|
||||
000031c4 abort
|
||||
00003100 main
|
||||
|
||||
|
||||
GLOBAL SYMBOLS: SORTED BY Symbol Address
|
||||
|
||||
address name
|
||||
------- ----
|
||||
00000000 IE1
|
||||
00000001 IE2
|
||||
00000002 IFG1
|
||||
00000003 IFG2
|
||||
00000005 ME2
|
||||
00000008 P9IN
|
||||
00000008 PBIN
|
||||
00000009 P10IN
|
||||
0000000a P9OUT
|
||||
0000000a PBOUT
|
||||
0000000b P10OUT
|
||||
0000000c P9DIR
|
||||
0000000c PBDIR
|
||||
0000000d P10DIR
|
||||
0000000e P9SEL
|
||||
0000000e PBSEL
|
||||
0000000f P10SEL
|
||||
00000018 P3IN
|
||||
00000019 P3OUT
|
||||
0000001a P3DIR
|
||||
0000001b P3SEL
|
||||
0000001c P4IN
|
||||
0000001d P4OUT
|
||||
0000001e P4DIR
|
||||
0000001f P4SEL
|
||||
00000020 P1IN
|
||||
00000021 P1OUT
|
||||
00000022 P1DIR
|
||||
00000023 P1IFG
|
||||
00000024 P1IES
|
||||
00000025 P1IE
|
||||
00000026 P1SEL
|
||||
00000028 P2IN
|
||||
00000029 P2OUT
|
||||
0000002a P2DIR
|
||||
0000002b P2IFG
|
||||
0000002c P2IES
|
||||
0000002d P2IE
|
||||
0000002e P2SEL
|
||||
00000030 P5IN
|
||||
00000031 P5OUT
|
||||
00000032 P5DIR
|
||||
00000033 P5SEL
|
||||
00000034 P6IN
|
||||
00000035 P6OUT
|
||||
00000036 P6DIR
|
||||
00000037 P6SEL
|
||||
00000038 P7IN
|
||||
00000038 PAIN
|
||||
00000039 P8IN
|
||||
0000003a P7OUT
|
||||
0000003a PAOUT
|
||||
0000003b P8OUT
|
||||
0000003c P7DIR
|
||||
0000003c PADIR
|
||||
0000003d P8DIR
|
||||
0000003e P7SEL
|
||||
0000003e PASEL
|
||||
0000003f P8SEL
|
||||
00000040 BTCTL
|
||||
00000040 RTCTL
|
||||
00000041 RTCCTL
|
||||
00000042 RTCNT1
|
||||
00000042 RTCTIM0
|
||||
00000043 RTCNT2
|
||||
00000044 RTCNT3
|
||||
00000044 RTCTIM1
|
||||
00000045 RTCNT4
|
||||
00000046 BTCNT1
|
||||
00000046 BTCNT12
|
||||
00000047 BTCNT2
|
||||
0000004c RTCDATE
|
||||
0000004c RTCDAY
|
||||
0000004d RTCMON
|
||||
0000004e RTCYEAR
|
||||
0000004e RTCYEARL
|
||||
0000004f RTCYEARH
|
||||
00000050 SCFI0
|
||||
00000050 __STACK_SIZE
|
||||
00000051 SCFI1
|
||||
00000052 SCFQCTL
|
||||
00000053 FLL_CTL0
|
||||
00000054 FLL_CTL1
|
||||
00000056 SVSCTL
|
||||
00000059 CACTL1
|
||||
0000005a CACTL2
|
||||
0000005b CAPD
|
||||
0000005d UCA0ABCTL
|
||||
0000005e UCA0IRTCTL
|
||||
0000005f UCA0IRRCTL
|
||||
00000060 UCA0CTL0
|
||||
00000061 UCA0CTL1
|
||||
00000062 UCA0BR0
|
||||
00000063 UCA0BR1
|
||||
00000064 UCA0MCTL
|
||||
00000065 UCA0STAT
|
||||
00000066 UCA0RXBUF
|
||||
00000067 UCA0TXBUF
|
||||
00000068 UCB0CTL0
|
||||
00000069 UCB0CTL1
|
||||
0000006a UCB0BR0
|
||||
0000006b UCB0BR1
|
||||
0000006c UCB0I2CIE
|
||||
0000006d UCB0STAT
|
||||
0000006e UCB0RXBUF
|
||||
0000006f UCB0TXBUF
|
||||
00000078 U1CTL
|
||||
00000079 U1TCTL
|
||||
0000007a U1RCTL
|
||||
0000007b U1MCTL
|
||||
0000007c U1BR0
|
||||
0000007d U1BR1
|
||||
0000007e U1RXBUF
|
||||
0000007f U1TXBUF
|
||||
00000080 ADC12MCTL0
|
||||
00000081 ADC12MCTL1
|
||||
00000082 ADC12MCTL2
|
||||
00000083 ADC12MCTL3
|
||||
00000084 ADC12MCTL4
|
||||
00000085 ADC12MCTL5
|
||||
00000086 ADC12MCTL6
|
||||
00000087 ADC12MCTL7
|
||||
00000088 ADC12MCTL8
|
||||
00000089 ADC12MCTL9
|
||||
0000008a ADC12MCTL10
|
||||
0000008b ADC12MCTL11
|
||||
0000008c ADC12MCTL12
|
||||
0000008d ADC12MCTL13
|
||||
0000008e ADC12MCTL14
|
||||
0000008f ADC12MCTL15
|
||||
00000090 LCDACTL
|
||||
00000091 LCDM1
|
||||
00000092 LCDM2
|
||||
00000093 LCDM3
|
||||
00000094 LCDM4
|
||||
00000095 LCDM5
|
||||
00000096 LCDM6
|
||||
00000097 LCDM7
|
||||
00000098 LCDM8
|
||||
00000099 LCDM9
|
||||
0000009a LCDM10
|
||||
0000009b LCDM11
|
||||
0000009c LCDM12
|
||||
0000009d LCDM13
|
||||
0000009e LCDM14
|
||||
0000009f LCDM15
|
||||
000000a0 LCDM16
|
||||
000000a1 LCDM17
|
||||
000000a2 LCDM18
|
||||
000000a3 LCDM19
|
||||
000000a4 LCDM20
|
||||
000000ac LCDAPCTL0
|
||||
000000ad LCDAPCTL1
|
||||
000000ae LCDAVCTL0
|
||||
000000af LCDAVCTL1
|
||||
000000c0 OA0CTL0
|
||||
000000c1 OA0CTL1
|
||||
000000c2 OA1CTL0
|
||||
000000c3 OA1CTL1
|
||||
000000c4 OA2CTL0
|
||||
000000c5 OA2CTL1
|
||||
00000118 UCB0I2COA
|
||||
0000011a UCB0I2CSA
|
||||
0000011e TBIV
|
||||
00000120 WDTCTL
|
||||
00000122 DMACTL0
|
||||
00000124 DMACTL1
|
||||
00000126 DMAIV
|
||||
00000128 FCTL1
|
||||
0000012a FCTL2
|
||||
0000012c FCTL3
|
||||
0000012e TAIV
|
||||
00000130 MPY
|
||||
00000132 MPYS
|
||||
00000134 MAC
|
||||
00000136 MACS
|
||||
00000138 OP2
|
||||
0000013a RESLO
|
||||
0000013c RESHI
|
||||
0000013e SUMEXT
|
||||
00000140 ADC12MEM0
|
||||
00000142 ADC12MEM1
|
||||
00000144 ADC12MEM2
|
||||
00000146 ADC12MEM3
|
||||
00000148 ADC12MEM4
|
||||
0000014a ADC12MEM5
|
||||
0000014c ADC12MEM6
|
||||
0000014e ADC12MEM7
|
||||
00000150 ADC12MEM8
|
||||
00000152 ADC12MEM9
|
||||
00000154 ADC12MEM10
|
||||
00000156 ADC12MEM11
|
||||
00000158 ADC12MEM12
|
||||
0000015a ADC12MEM13
|
||||
0000015c ADC12MEM14
|
||||
0000015e ADC12MEM15
|
||||
00000160 TACTL
|
||||
00000162 TACCTL0
|
||||
00000164 TACCTL1
|
||||
00000166 TACCTL2
|
||||
00000170 TAR
|
||||
00000172 TACCR0
|
||||
00000174 TACCR1
|
||||
00000176 TACCR2
|
||||
00000180 TBCTL
|
||||
00000182 TBCCTL0
|
||||
00000184 TBCCTL1
|
||||
00000186 TBCCTL2
|
||||
00000188 TBCCTL3
|
||||
0000018a TBCCTL4
|
||||
0000018c TBCCTL5
|
||||
0000018e TBCCTL6
|
||||
00000190 TBR
|
||||
00000192 TBCCR0
|
||||
00000194 TBCCR1
|
||||
00000196 TBCCR2
|
||||
00000198 TBCCR3
|
||||
0000019a TBCCR4
|
||||
0000019c TBCCR5
|
||||
0000019e TBCCR6
|
||||
000001a0 ADC12CTL0
|
||||
000001a2 ADC12CTL1
|
||||
000001a4 ADC12IFG
|
||||
000001a6 ADC12IE
|
||||
000001a8 ADC12IV
|
||||
000001c0 DAC12_0CTL
|
||||
000001c2 DAC12_1CTL
|
||||
000001c8 DAC12_0DAT
|
||||
000001ca DAC12_1DAT
|
||||
000001d0 DMA0CTL
|
||||
000001d2 DMA0SA
|
||||
000001d2 DMA0SAL
|
||||
000001d6 DMA0DA
|
||||
000001d6 DMA0DAL
|
||||
000001da DMA0SZ
|
||||
000001dc DMA1CTL
|
||||
000001de DMA1SA
|
||||
000001de DMA1SAL
|
||||
000001e2 DMA1DA
|
||||
000001e2 DMA1DAL
|
||||
000001e6 DMA1SZ
|
||||
000001e8 DMA2CTL
|
||||
000001ea DMA2SA
|
||||
000001ea DMA2SAL
|
||||
000001ee DMA2DA
|
||||
000001ee DMA2DAL
|
||||
000001f2 DMA2SZ
|
||||
000030b0 _stack
|
||||
00003100 __STACK_END
|
||||
00003100 main
|
||||
0000315c Port1_ISR
|
||||
000031b0 _c_int00_noinit_noargs
|
||||
000031c4 C$$EXIT
|
||||
000031c4 abort
|
||||
000031ca _system_pre_init
|
||||
000031ce __TI_ISR_TRAP
|
||||
0000ffdc __TI_int14
|
||||
0000ffde __TI_int15
|
||||
0000ffe0 __TI_int16
|
||||
0000ffe2 __TI_int17
|
||||
0000ffe4 __TI_int18
|
||||
0000ffe6 __TI_int19
|
||||
0000ffe8 __TI_int20
|
||||
0000ffea __TI_int21
|
||||
0000ffec __TI_int22
|
||||
0000ffee __TI_int23
|
||||
0000fff0 __TI_int24
|
||||
0000fff2 __TI_int25
|
||||
0000fff4 __TI_int26
|
||||
0000fff6 __TI_int27
|
||||
0000fff8 __TI_int28
|
||||
0000fffa __TI_int29
|
||||
0000fffc __TI_int30
|
||||
0000fffe _reset_vector
|
||||
ffffffff __TI_pprof_out_hndl
|
||||
ffffffff __TI_prof_data_size
|
||||
ffffffff __TI_prof_data_start
|
||||
ffffffff __c_args__
|
||||
|
||||
[278 symbols]
|
||||
BIN
CPE325/Lab6_Problem2/Debug/Lab6_Problem2.out
Normal file
BIN
CPE325/Lab6_Problem2/Debug/Lab6_Problem2.out
Normal file
Binary file not shown.
3083
CPE325/Lab6_Problem2/Debug/Lab6_Problem2_linkInfo.xml
Normal file
3083
CPE325/Lab6_Problem2/Debug/Lab6_Problem2_linkInfo.xml
Normal file
File diff suppressed because it is too large
Load Diff
1
CPE325/Lab6_Problem2/Debug/ccsObjs.opt
Normal file
1
CPE325/Lab6_Problem2/Debug/ccsObjs.opt
Normal file
@ -0,0 +1 @@
|
||||
"./main.obj" "../lnk_msp430fg4618.cmd" -llibc.a
|
||||
21
CPE325/Lab6_Problem2/Debug/main.d
Normal file
21
CPE325/Lab6_Problem2/Debug/main.d
Normal file
@ -0,0 +1,21 @@
|
||||
# FIXED
|
||||
|
||||
main.obj: ../main.c
|
||||
main.obj: C:/ti/ccs1040/ccs/ccs_base/msp430/include/msp430.h
|
||||
main.obj: C:/ti/ccs1040/ccs/ccs_base/msp430/include/msp430fg4618.h
|
||||
main.obj: C:/ti/ccs1040/ccs/ccs_base/msp430/include/in430.h
|
||||
main.obj: C:/ti/ccs1040/ccs/tools/compiler/ti-cgt-msp430_20.2.5.LTS/include/intrinsics.h
|
||||
main.obj: C:/ti/ccs1040/ccs/tools/compiler/ti-cgt-msp430_20.2.5.LTS/include/intrinsics_legacy_undefs.h
|
||||
|
||||
../main.c:
|
||||
|
||||
C:/ti/ccs1040/ccs/ccs_base/msp430/include/msp430.h:
|
||||
|
||||
C:/ti/ccs1040/ccs/ccs_base/msp430/include/msp430fg4618.h:
|
||||
|
||||
C:/ti/ccs1040/ccs/ccs_base/msp430/include/in430.h:
|
||||
|
||||
C:/ti/ccs1040/ccs/tools/compiler/ti-cgt-msp430_20.2.5.LTS/include/intrinsics.h:
|
||||
|
||||
C:/ti/ccs1040/ccs/tools/compiler/ti-cgt-msp430_20.2.5.LTS/include/intrinsics_legacy_undefs.h:
|
||||
|
||||
614
CPE325/Lab6_Problem2/Debug/main.lst
Normal file
614
CPE325/Lab6_Problem2/Debug/main.lst
Normal file
@ -0,0 +1,614 @@
|
||||
MSP430 Assembler PC v20.2.5 Thu Dec 2 20:38:06 2021
|
||||
|
||||
Copyright (c) 2003-2018 Texas Instruments Incorporated
|
||||
C:\Users\LIBRAR~1\AppData\Local\Temp\{B3212681-677C-4407-B7A6-59626703CBB1} PAGE 1
|
||||
|
||||
1 ;******************************************************************************
|
||||
2 ;* MSP430 G3 C/C++ Codegen PC v20.2.5.LTS *
|
||||
3 ;* Date/Time created: Thu Dec 2 20:38:06 2021 *
|
||||
4 ;******************************************************************************
|
||||
5 .compiler_opts --abi=eabi --diag_wrap=off --hll_source=on --mem_model:code=small --mem_model:d
|
||||
6
|
||||
7 $C$DW$CU .dwtag DW_TAG_compile_unit
|
||||
8 .dwattr $C$DW$CU, DW_AT_name("../main.c")
|
||||
9 .dwattr $C$DW$CU, DW_AT_producer("TI MSP430 G3 C/C++ Codegen PC v20.2.5.LTS Copyright (c) 2003
|
||||
10 .dwattr $C$DW$CU, DW_AT_TI_version(0x01)
|
||||
11 .dwattr $C$DW$CU, DW_AT_comp_dir("C:\CPE325_Workspace\Lab6_Problem2\Debug")
|
||||
12 ; Interrupt vector table mappings
|
||||
13 000000 .intvec ".int20", Port1_ISR
|
||||
000000
|
||||
14 $C$DW$1 .dwtag DW_TAG_variable
|
||||
15 .dwattr $C$DW$1, DW_AT_name("SCFI0")
|
||||
16 .dwattr $C$DW$1, DW_AT_TI_symbol_name("SCFI0")
|
||||
17 .dwattr $C$DW$1, DW_AT_type(*$C$DW$T$23)
|
||||
18 .dwattr $C$DW$1, DW_AT_declaration
|
||||
19 .dwattr $C$DW$1, DW_AT_external
|
||||
20 .dwattr $C$DW$1, DW_AT_decl_file("C:\ti\ccs1040\ccs\ccs_base\msp430\include\msp430fg4618.h")
|
||||
21 .dwattr $C$DW$1, DW_AT_decl_line(0x331)
|
||||
22 .dwattr $C$DW$1, DW_AT_decl_column(0x01)
|
||||
23
|
||||
24 $C$DW$2 .dwtag DW_TAG_variable
|
||||
25 .dwattr $C$DW$2, DW_AT_name("SCFQCTL")
|
||||
26 .dwattr $C$DW$2, DW_AT_TI_symbol_name("SCFQCTL")
|
||||
27 .dwattr $C$DW$2, DW_AT_type(*$C$DW$T$23)
|
||||
28 .dwattr $C$DW$2, DW_AT_declaration
|
||||
29 .dwattr $C$DW$2, DW_AT_external
|
||||
30 .dwattr $C$DW$2, DW_AT_decl_file("C:\ti\ccs1040\ccs\ccs_base\msp430\include\msp430fg4618.h")
|
||||
31 .dwattr $C$DW$2, DW_AT_decl_line(0x33f)
|
||||
32 .dwattr $C$DW$2, DW_AT_decl_column(0x01)
|
||||
33
|
||||
34 $C$DW$3 .dwtag DW_TAG_variable
|
||||
35 .dwattr $C$DW$3, DW_AT_name("FLL_CTL0")
|
||||
36 .dwattr $C$DW$3, DW_AT_TI_symbol_name("FLL_CTL0")
|
||||
37 .dwattr $C$DW$3, DW_AT_type(*$C$DW$T$23)
|
||||
38 .dwattr $C$DW$3, DW_AT_declaration
|
||||
39 .dwattr $C$DW$3, DW_AT_external
|
||||
40 .dwattr $C$DW$3, DW_AT_decl_file("C:\ti\ccs1040\ccs\ccs_base\msp430\include\msp430fg4618.h")
|
||||
41 .dwattr $C$DW$3, DW_AT_decl_line(0x34b)
|
||||
42 .dwattr $C$DW$3, DW_AT_decl_column(0x01)
|
||||
43
|
||||
44 $C$DW$4 .dwtag DW_TAG_variable
|
||||
45 .dwattr $C$DW$4, DW_AT_name("P1IFG")
|
||||
46 .dwattr $C$DW$4, DW_AT_TI_symbol_name("P1IFG")
|
||||
47 .dwattr $C$DW$4, DW_AT_type(*$C$DW$T$23)
|
||||
48 .dwattr $C$DW$4, DW_AT_declaration
|
||||
49 .dwattr $C$DW$4, DW_AT_external
|
||||
50 .dwattr $C$DW$4, DW_AT_decl_file("C:\ti\ccs1040\ccs\ccs_base\msp430\include\msp430fg4618.h")
|
||||
51 .dwattr $C$DW$4, DW_AT_decl_line(0x450)
|
||||
52 .dwattr $C$DW$4, DW_AT_decl_column(0x01)
|
||||
53
|
||||
54 $C$DW$5 .dwtag DW_TAG_variable
|
||||
MSP430 Assembler PC v20.2.5 Thu Dec 2 20:38:06 2021
|
||||
|
||||
Copyright (c) 2003-2018 Texas Instruments Incorporated
|
||||
C:\Users\LIBRAR~1\AppData\Local\Temp\{B3212681-677C-4407-B7A6-59626703CBB1} PAGE 2
|
||||
|
||||
55 .dwattr $C$DW$5, DW_AT_name("P1IES")
|
||||
56 .dwattr $C$DW$5, DW_AT_TI_symbol_name("P1IES")
|
||||
57 .dwattr $C$DW$5, DW_AT_type(*$C$DW$T$23)
|
||||
58 .dwattr $C$DW$5, DW_AT_declaration
|
||||
59 .dwattr $C$DW$5, DW_AT_external
|
||||
60 .dwattr $C$DW$5, DW_AT_decl_file("C:\ti\ccs1040\ccs\ccs_base\msp430\include\msp430fg4618.h")
|
||||
61 .dwattr $C$DW$5, DW_AT_decl_line(0x451)
|
||||
62 .dwattr $C$DW$5, DW_AT_decl_column(0x01)
|
||||
63
|
||||
64 $C$DW$6 .dwtag DW_TAG_variable
|
||||
65 .dwattr $C$DW$6, DW_AT_name("P1IE")
|
||||
66 .dwattr $C$DW$6, DW_AT_TI_symbol_name("P1IE")
|
||||
67 .dwattr $C$DW$6, DW_AT_type(*$C$DW$T$23)
|
||||
68 .dwattr $C$DW$6, DW_AT_declaration
|
||||
69 .dwattr $C$DW$6, DW_AT_external
|
||||
70 .dwattr $C$DW$6, DW_AT_decl_file("C:\ti\ccs1040\ccs\ccs_base\msp430\include\msp430fg4618.h")
|
||||
71 .dwattr $C$DW$6, DW_AT_decl_line(0x452)
|
||||
72 .dwattr $C$DW$6, DW_AT_decl_column(0x01)
|
||||
73
|
||||
74 $C$DW$7 .dwtag DW_TAG_variable
|
||||
75 .dwattr $C$DW$7, DW_AT_name("P2OUT")
|
||||
76 .dwattr $C$DW$7, DW_AT_TI_symbol_name("P2OUT")
|
||||
77 .dwattr $C$DW$7, DW_AT_type(*$C$DW$T$23)
|
||||
78 .dwattr $C$DW$7, DW_AT_declaration
|
||||
79 .dwattr $C$DW$7, DW_AT_external
|
||||
80 .dwattr $C$DW$7, DW_AT_decl_file("C:\ti\ccs1040\ccs\ccs_base\msp430\include\msp430fg4618.h")
|
||||
81 .dwattr $C$DW$7, DW_AT_decl_line(0x456)
|
||||
82 .dwattr $C$DW$7, DW_AT_decl_column(0x01)
|
||||
83
|
||||
84 $C$DW$8 .dwtag DW_TAG_variable
|
||||
85 .dwattr $C$DW$8, DW_AT_name("P2DIR")
|
||||
86 .dwattr $C$DW$8, DW_AT_TI_symbol_name("P2DIR")
|
||||
87 .dwattr $C$DW$8, DW_AT_type(*$C$DW$T$23)
|
||||
88 .dwattr $C$DW$8, DW_AT_declaration
|
||||
89 .dwattr $C$DW$8, DW_AT_external
|
||||
90 .dwattr $C$DW$8, DW_AT_decl_file("C:\ti\ccs1040\ccs\ccs_base\msp430\include\msp430fg4618.h")
|
||||
91 .dwattr $C$DW$8, DW_AT_decl_line(0x457)
|
||||
92 .dwattr $C$DW$8, DW_AT_decl_column(0x01)
|
||||
93
|
||||
94 $C$DW$9 .dwtag DW_TAG_variable
|
||||
95 .dwattr $C$DW$9, DW_AT_name("WDTCTL")
|
||||
96 .dwattr $C$DW$9, DW_AT_TI_symbol_name("WDTCTL")
|
||||
97 .dwattr $C$DW$9, DW_AT_type(*$C$DW$T$25)
|
||||
98 .dwattr $C$DW$9, DW_AT_declaration
|
||||
99 .dwattr $C$DW$9, DW_AT_external
|
||||
100 .dwattr $C$DW$9, DW_AT_decl_file("C:\ti\ccs1040\ccs\ccs_base\msp430\include\msp430fg4618.h")
|
||||
101 .dwattr $C$DW$9, DW_AT_decl_line(0x6df)
|
||||
102 .dwattr $C$DW$9, DW_AT_decl_column(0x01)
|
||||
103
|
||||
104 ; C:\ti\ccs1040\ccs\tools\compiler\ti-cgt-msp430_20.2.5.LTS\bin\acpia430.exe -@C:\\Users\\LIBRAR
|
||||
105 000000 .sect ".text:main"
|
||||
106 .clink
|
||||
107 .global main
|
||||
108
|
||||
109 $C$DW$10 .dwtag DW_TAG_subprogram
|
||||
MSP430 Assembler PC v20.2.5 Thu Dec 2 20:38:06 2021
|
||||
|
||||
Copyright (c) 2003-2018 Texas Instruments Incorporated
|
||||
C:\Users\LIBRAR~1\AppData\Local\Temp\{B3212681-677C-4407-B7A6-59626703CBB1} PAGE 3
|
||||
|
||||
110 .dwattr $C$DW$10, DW_AT_name("main")
|
||||
111 .dwattr $C$DW$10, DW_AT_low_pc(main)
|
||||
112 .dwattr $C$DW$10, DW_AT_high_pc(0x00)
|
||||
113 .dwattr $C$DW$10, DW_AT_TI_symbol_name("main")
|
||||
114 .dwattr $C$DW$10, DW_AT_external
|
||||
115 .dwattr $C$DW$10, DW_AT_type(*$C$DW$T$10)
|
||||
116 .dwattr $C$DW$10, DW_AT_TI_begin_file("../main.c")
|
||||
117 .dwattr $C$DW$10, DW_AT_TI_begin_line(0x0b)
|
||||
118 .dwattr $C$DW$10, DW_AT_TI_begin_column(0x05)
|
||||
119 .dwattr $C$DW$10, DW_AT_decl_file("../main.c")
|
||||
120 .dwattr $C$DW$10, DW_AT_decl_line(0x0b)
|
||||
121 .dwattr $C$DW$10, DW_AT_decl_column(0x05)
|
||||
122 .dwattr $C$DW$10, DW_AT_TI_max_frame_size(0x02)
|
||||
123 .dwpsn file "../main.c",line 12,column 1,is_stmt,address main,isa 0
|
||||
124
|
||||
125 .dwfde $C$DW$CIE, main
|
||||
126
|
||||
127 ;*****************************************************************************
|
||||
128 ;* FUNCTION NAME: main *
|
||||
129 ;* *
|
||||
130 ;* Regs Modified : SP,SR *
|
||||
131 ;* Regs Used : SP,SR *
|
||||
132 ;* Local Frame Size : 0 Args + 0 Auto + 0 Save = 0 byte *
|
||||
133 ;*****************************************************************************
|
||||
134 000000 main:
|
||||
135 ;* --------------------------------------------------------------------------*
|
||||
136 .dwcfi cfa_offset, 2
|
||||
137 .dwcfi save_reg_to_mem, 16, -2
|
||||
138 .dwpsn file "../main.c",line 13,column 2,is_stmt,isa 0
|
||||
139 000000 40B2 MOV.W #23168,&WDTCTL+0 ; [] |13|
|
||||
000002 5A80
|
||||
000004 0000!
|
||||
140 .dwpsn file "../main.c",line 14,column 2,is_stmt,isa 0
|
||||
141 000006 D2E2 OR.B #4,&P2DIR+0 ; [] |14|
|
||||
000008 0000!
|
||||
142 .dwpsn file "../main.c",line 15,column 2,is_stmt,isa 0
|
||||
143 00000a 43C2 MOV.B #0,&P2OUT+0 ; [] |15|
|
||||
00000c 0000!
|
||||
144 .dwpsn file "../main.c",line 16,column 2,is_stmt,isa 0
|
||||
145 00000e D232 EINT ; [] |16|
|
||||
146 .dwpsn file "../main.c",line 17,column 2,is_stmt,isa 0
|
||||
147 000010 D3D2 OR.B #1,&P1IE+0 ; [] |17|
|
||||
000012 0000!
|
||||
148 .dwpsn file "../main.c",line 18,column 2,is_stmt,isa 0
|
||||
149 000014 D3E2 OR.B #2,&P1IE+0 ; [] |18|
|
||||
000016 0000!
|
||||
150 .dwpsn file "../main.c",line 19,column 2,is_stmt,isa 0
|
||||
151 000018 D3D2 OR.B #1,&P1IES+0 ; [] |19|
|
||||
00001a 0000!
|
||||
152 .dwpsn file "../main.c",line 20,column 2,is_stmt,isa 0
|
||||
153 00001c C3D2 BIC.B #1,&P1IFG+0 ; [] |20|
|
||||
00001e 0000!
|
||||
154 .dwpsn file "../main.c",line 21,column 2,is_stmt,isa 0
|
||||
155 000020 D3E2 OR.B #2,&P1IES+0 ; [] |21|
|
||||
000022 0000!
|
||||
MSP430 Assembler PC v20.2.5 Thu Dec 2 20:38:06 2021
|
||||
|
||||
Copyright (c) 2003-2018 Texas Instruments Incorporated
|
||||
C:\Users\LIBRAR~1\AppData\Local\Temp\{B3212681-677C-4407-B7A6-59626703CBB1} PAGE 4
|
||||
|
||||
156 .dwpsn file "../main.c",line 22,column 2,is_stmt,isa 0
|
||||
157 000024 C3E2 BIC.B #2,&P1IFG+0 ; [] |22|
|
||||
000026 0000!
|
||||
158 .dwpsn file "../main.c",line 23,column 2,is_stmt,isa 0
|
||||
159 000028 D0F2 OR.B #176,&FLL_CTL0+0 ; [] |23|
|
||||
00002a 00B0
|
||||
00002c 0000!
|
||||
160 .dwpsn file "../main.c",line 24,column 5,is_stmt,isa 0
|
||||
161 00002e D0F2 OR.B #80,&SCFI0+0 ; [] |24|
|
||||
000030 0050
|
||||
000032 0000!
|
||||
162 .dwpsn file "../main.c",line 25,column 5,is_stmt,isa 0
|
||||
163 000034 40F2 MOV.B #63,&SCFQCTL+0 ; [] |25|
|
||||
000036 003F
|
||||
000038 0000!
|
||||
164 .dwpsn file "../main.c",line 26,column 8,is_stmt,isa 0
|
||||
165 ;* --------------------------------------------------------------------------*
|
||||
166 ;* BEGIN LOOP $C$L1
|
||||
167 ;*
|
||||
168 ;* Loop source line : 26
|
||||
169 ;* Loop closing brace source line : 29
|
||||
170 ;* Known Minimum Trip Count : 1
|
||||
171 ;* Known Maximum Trip Count : 4294967295
|
||||
172 ;* Known Max Trip Count Factor : 1
|
||||
173 ;* --------------------------------------------------------------------------*
|
||||
174 00003a $C$L1:
|
||||
175 .dwpsn file "../main.c",line 27,column 6,is_stmt,isa 0
|
||||
176 ; Begin 1048576 cycle delay
|
||||
177 .newblock
|
||||
178 00003a 120D PUSH r13
|
||||
179 00003c 120E PUSH r14
|
||||
180 00003e 403D MOV.W #16380, r13
|
||||
000040 3FFC
|
||||
181 000042 403E MOV.W #3, r14
|
||||
000044 0003
|
||||
182 000046 831D $1: SUB.W #1, r13
|
||||
183 000048 730E SUBC.W #0, r14
|
||||
184 00004a 23FD JNE $1
|
||||
185 00004c 930D TST.W r13
|
||||
186 00004e 23FB JNE $1
|
||||
187 000050 413E POP r14
|
||||
188 000052 413D POP r13
|
||||
189 000054 3C00 JMP ($ + 2)
|
||||
190 ; End 1048576 cycle delay ; [] |27|
|
||||
191 .dwpsn file "../main.c",line 28,column 6,is_stmt,isa 0
|
||||
192 000056 E2E2 XOR.B #4,&P2OUT+0 ; [] |28|
|
||||
000058 0000!
|
||||
193 .dwpsn file "../main.c",line 26,column 8,is_stmt,isa 0
|
||||
194 00005a 3FEF JMP $C$L1 ; [] |26|
|
||||
195 ; [] |26|
|
||||
196 ;* --------------------------------------------------------------------------*
|
||||
197 .dwattr $C$DW$10, DW_AT_TI_end_file("../main.c")
|
||||
198 .dwattr $C$DW$10, DW_AT_TI_end_line(0x1e)
|
||||
199 .dwattr $C$DW$10, DW_AT_TI_end_column(0x01)
|
||||
200 .dwendentry
|
||||
MSP430 Assembler PC v20.2.5 Thu Dec 2 20:38:06 2021
|
||||
|
||||
Copyright (c) 2003-2018 Texas Instruments Incorporated
|
||||
C:\Users\LIBRAR~1\AppData\Local\Temp\{B3212681-677C-4407-B7A6-59626703CBB1} PAGE 5
|
||||
|
||||
201 .dwendtag $C$DW$10
|
||||
202
|
||||
203 000000 .sect ".text:Port1_ISR"
|
||||
204 .clink
|
||||
205 .global Port1_ISR
|
||||
206
|
||||
207 $C$DW$11 .dwtag DW_TAG_subprogram
|
||||
208 .dwattr $C$DW$11, DW_AT_name("Port1_ISR")
|
||||
209 .dwattr $C$DW$11, DW_AT_low_pc(Port1_ISR)
|
||||
210 .dwattr $C$DW$11, DW_AT_high_pc(0x00)
|
||||
211 .dwattr $C$DW$11, DW_AT_TI_symbol_name("Port1_ISR")
|
||||
212 .dwattr $C$DW$11, DW_AT_external
|
||||
213 .dwattr $C$DW$11, DW_AT_TI_begin_file("../main.c")
|
||||
214 .dwattr $C$DW$11, DW_AT_TI_begin_line(0x21)
|
||||
215 .dwattr $C$DW$11, DW_AT_TI_begin_column(0x12)
|
||||
216 .dwattr $C$DW$11, DW_AT_decl_file("../main.c")
|
||||
217 .dwattr $C$DW$11, DW_AT_decl_line(0x21)
|
||||
218 .dwattr $C$DW$11, DW_AT_decl_column(0x12)
|
||||
219 .dwattr $C$DW$11, DW_AT_TI_interrupt
|
||||
220 .dwattr $C$DW$11, DW_AT_TI_max_frame_size(0x02)
|
||||
221 .dwpsn file "../main.c",line 33,column 35,is_stmt,address Port1_ISR,isa 0
|
||||
222
|
||||
223 .dwfde $C$DW$CIE, Port1_ISR
|
||||
224
|
||||
225 ;*****************************************************************************
|
||||
226 ;* FUNCTION NAME: Port1_ISR *
|
||||
227 ;* *
|
||||
228 ;* Regs Modified : SP,SR *
|
||||
229 ;* Regs Used : SP,SR *
|
||||
230 ;* Local Frame Size : 0 Args + 0 Auto + 0 Save = 0 byte *
|
||||
231 ;*****************************************************************************
|
||||
232 000000 Port1_ISR:
|
||||
233 ;* --------------------------------------------------------------------------*
|
||||
234 .dwcfi cfa_offset, 2
|
||||
235 .dwcfi save_reg_to_mem, 16, -2
|
||||
236 .dwpsn file "../main.c",line 34,column 5,is_stmt,isa 0
|
||||
237 000000 B3D2 BIT.B #1,&P1IFG+0 ; [] |34|
|
||||
000002 0000!
|
||||
238 000004 2412 JEQ $C$L2 ; [] |34|
|
||||
239 ; [] |34|
|
||||
240 ;* --------------------------------------------------------------------------*
|
||||
241 .dwpsn file "../main.c",line 36,column 11,is_stmt,isa 0
|
||||
242 000006 D0F2 OR.B #176,&FLL_CTL0+0 ; [] |36|
|
||||
000008 00B0
|
||||
00000a 0000!
|
||||
243 .dwpsn file "../main.c",line 37,column 11,is_stmt,isa 0
|
||||
244 00000c D0F2 OR.B #80,&SCFI0+0 ; [] |37|
|
||||
00000e 0050
|
||||
000010 0000!
|
||||
245 .dwpsn file "../main.c",line 38,column 11,is_stmt,isa 0
|
||||
246 000012 40F2 MOV.B #127,&SCFQCTL+0 ; [] |38|
|
||||
000014 007F
|
||||
000016 0000!
|
||||
247 .dwpsn file "../main.c",line 39,column 11,is_stmt,isa 0
|
||||
248 000018 D3D2 OR.B #1,&P1IES+0 ; [] |39|
|
||||
MSP430 Assembler PC v20.2.5 Thu Dec 2 20:38:06 2021
|
||||
|
||||
Copyright (c) 2003-2018 Texas Instruments Incorporated
|
||||
C:\Users\LIBRAR~1\AppData\Local\Temp\{B3212681-677C-4407-B7A6-59626703CBB1} PAGE 6
|
||||
|
||||
00001a 0000!
|
||||
249 .dwpsn file "../main.c",line 40,column 11,is_stmt,isa 0
|
||||
250 00001c C3D2 BIC.B #1,&P1IFG+0 ; [] |40|
|
||||
00001e 0000!
|
||||
251 .dwpsn file "../main.c",line 41,column 11,is_stmt,isa 0
|
||||
252 000020 D3E2 OR.B #2,&P1IES+0 ; [] |41|
|
||||
000022 0000!
|
||||
253 .dwpsn file "../main.c",line 42,column 11,is_stmt,isa 0
|
||||
254 000024 C3E2 BIC.B #2,&P1IFG+0 ; [] |42|
|
||||
000026 0000!
|
||||
255 000028 3C14 JMP $C$L3 ; []
|
||||
256 ; []
|
||||
257 ;* --------------------------------------------------------------------------*
|
||||
258 00002a $C$L2:
|
||||
259 .dwpsn file "../main.c",line 44,column 10,is_stmt,isa 0
|
||||
260 00002a B3E2 BIT.B #2,&P1IFG+0 ; [] |44|
|
||||
00002c 0000!
|
||||
261 00002e 2411 JEQ $C$L3 ; [] |44|
|
||||
262 ; [] |44|
|
||||
263 ;* --------------------------------------------------------------------------*
|
||||
264 .dwpsn file "../main.c",line 46,column 11,is_stmt,isa 0
|
||||
265 000030 D0F2 OR.B #176,&FLL_CTL0+0 ; [] |46|
|
||||
000032 00B0
|
||||
000034 0000!
|
||||
266 .dwpsn file "../main.c",line 47,column 11,is_stmt,isa 0
|
||||
267 000036 D0F2 OR.B #80,&SCFI0+0 ; [] |47|
|
||||
000038 0050
|
||||
00003a 0000!
|
||||
268 .dwpsn file "../main.c",line 48,column 11,is_stmt,isa 0
|
||||
269 00003c 40F2 MOV.B #31,&SCFQCTL+0 ; [] |48|
|
||||
00003e 001F
|
||||
000040 0000!
|
||||
270 .dwpsn file "../main.c",line 49,column 11,is_stmt,isa 0
|
||||
271 000042 D3D2 OR.B #1,&P1IES+0 ; [] |49|
|
||||
000044 0000!
|
||||
272 .dwpsn file "../main.c",line 50,column 11,is_stmt,isa 0
|
||||
273 000046 C3D2 BIC.B #1,&P1IFG+0 ; [] |50|
|
||||
000048 0000!
|
||||
274 .dwpsn file "../main.c",line 51,column 11,is_stmt,isa 0
|
||||
275 00004a D3E2 OR.B #2,&P1IES+0 ; [] |51|
|
||||
00004c 0000!
|
||||
276 .dwpsn file "../main.c",line 52,column 11,is_stmt,isa 0
|
||||
277 00004e C3E2 BIC.B #2,&P1IFG+0 ; [] |52|
|
||||
000050 0000!
|
||||
278 .dwpsn file "../main.c",line 54,column 1,is_stmt,isa 0
|
||||
279 ;* --------------------------------------------------------------------------*
|
||||
280 $C$L3:
|
||||
281 $C$DW$12 .dwtag DW_TAG_TI_branch
|
||||
282 .dwattr $C$DW$12, DW_AT_low_pc(0x00)
|
||||
283 .dwattr $C$DW$12, DW_AT_TI_return
|
||||
284
|
||||
285 000052 1300 RETI ; []
|
||||
286 ; []
|
||||
287 .dwattr $C$DW$11, DW_AT_TI_end_file("../main.c")
|
||||
288 .dwattr $C$DW$11, DW_AT_TI_end_line(0x36)
|
||||
MSP430 Assembler PC v20.2.5 Thu Dec 2 20:38:06 2021
|
||||
|
||||
Copyright (c) 2003-2018 Texas Instruments Incorporated
|
||||
C:\Users\LIBRAR~1\AppData\Local\Temp\{B3212681-677C-4407-B7A6-59626703CBB1} PAGE 7
|
||||
|
||||
289 .dwattr $C$DW$11, DW_AT_TI_end_column(0x01)
|
||||
290 .dwendentry
|
||||
291 .dwendtag $C$DW$11
|
||||
292
|
||||
293 ;*****************************************************************************
|
||||
294 ;* UNDEFINED EXTERNAL REFERENCES *
|
||||
295 ;*****************************************************************************
|
||||
296 .global SCFI0
|
||||
297 .global SCFQCTL
|
||||
298 .global FLL_CTL0
|
||||
299 .global P1IFG
|
||||
300 .global P1IES
|
||||
301 .global P1IE
|
||||
302 .global P2OUT
|
||||
303 .global P2DIR
|
||||
304 .global WDTCTL
|
||||
305
|
||||
306 ;******************************************************************************
|
||||
307 ;* BUILD ATTRIBUTES *
|
||||
308 ;******************************************************************************
|
||||
309 .battr "TI", Tag_File, 1, Tag_LPM_INFO(1)
|
||||
310 .battr "TI", Tag_File, 1, Tag_PORTS_INIT_INFO("012345678901ABCDEFGHIJ0111111111101100000000001
|
||||
311 .battr "TI", Tag_File, 1, Tag_LEA_INFO(1)
|
||||
312 .battr "TI", Tag_File, 1, Tag_HW_MPY32_INFO(1)
|
||||
313 .battr "TI", Tag_File, 1, Tag_HW_MPY_ISR_INFO(1)
|
||||
314 .battr "TI", Tag_File, 1, Tag_HW_MPY_INLINE_INFO(1)
|
||||
315 .battr "mspabi", Tag_File, 1, Tag_enum_size(3)
|
||||
316
|
||||
317 ;******************************************************************************
|
||||
318 ;* TYPE INFORMATION *
|
||||
319 ;******************************************************************************
|
||||
320 $C$DW$T$2 .dwtag DW_TAG_unspecified_type
|
||||
321 .dwattr $C$DW$T$2, DW_AT_name("void")
|
||||
322
|
||||
323
|
||||
324 $C$DW$T$20 .dwtag DW_TAG_subroutine_type
|
||||
325 .dwattr $C$DW$T$20, DW_AT_language(DW_LANG_C)
|
||||
326 .dwendtag $C$DW$T$20
|
||||
327
|
||||
328 $C$DW$T$21 .dwtag DW_TAG_pointer_type
|
||||
329 .dwattr $C$DW$T$21, DW_AT_type(*$C$DW$T$20)
|
||||
330 .dwattr $C$DW$T$21, DW_AT_address_class(0x10)
|
||||
331
|
||||
332 $C$DW$T$22 .dwtag DW_TAG_typedef
|
||||
333 .dwattr $C$DW$T$22, DW_AT_name("__SFR_FARPTR")
|
||||
334 .dwattr $C$DW$T$22, DW_AT_type(*$C$DW$T$21)
|
||||
335 .dwattr $C$DW$T$22, DW_AT_language(DW_LANG_C)
|
||||
336 .dwattr $C$DW$T$22, DW_AT_decl_file("C:\ti\ccs1040\ccs\ccs_base\msp430\include\msp430fg4618.h"
|
||||
337 .dwattr $C$DW$T$22, DW_AT_decl_line(0x4d)
|
||||
338 .dwattr $C$DW$T$22, DW_AT_decl_column(0x11)
|
||||
339
|
||||
340 $C$DW$T$4 .dwtag DW_TAG_base_type
|
||||
341 .dwattr $C$DW$T$4, DW_AT_encoding(DW_ATE_boolean)
|
||||
342 .dwattr $C$DW$T$4, DW_AT_name("bool")
|
||||
343 .dwattr $C$DW$T$4, DW_AT_byte_size(0x01)
|
||||
MSP430 Assembler PC v20.2.5 Thu Dec 2 20:38:06 2021
|
||||
|
||||
Copyright (c) 2003-2018 Texas Instruments Incorporated
|
||||
C:\Users\LIBRAR~1\AppData\Local\Temp\{B3212681-677C-4407-B7A6-59626703CBB1} PAGE 8
|
||||
|
||||
344
|
||||
345 $C$DW$T$5 .dwtag DW_TAG_base_type
|
||||
346 .dwattr $C$DW$T$5, DW_AT_encoding(DW_ATE_signed_char)
|
||||
347 .dwattr $C$DW$T$5, DW_AT_name("signed char")
|
||||
348 .dwattr $C$DW$T$5, DW_AT_byte_size(0x01)
|
||||
349
|
||||
350 $C$DW$T$6 .dwtag DW_TAG_base_type
|
||||
351 .dwattr $C$DW$T$6, DW_AT_encoding(DW_ATE_unsigned_char)
|
||||
352 .dwattr $C$DW$T$6, DW_AT_name("unsigned char")
|
||||
353 .dwattr $C$DW$T$6, DW_AT_byte_size(0x01)
|
||||
354
|
||||
355 $C$DW$T$23 .dwtag DW_TAG_volatile_type
|
||||
356 .dwattr $C$DW$T$23, DW_AT_type(*$C$DW$T$6)
|
||||
357
|
||||
358 $C$DW$T$7 .dwtag DW_TAG_base_type
|
||||
359 .dwattr $C$DW$T$7, DW_AT_encoding(DW_ATE_signed_char)
|
||||
360 .dwattr $C$DW$T$7, DW_AT_name("wchar_t")
|
||||
361 .dwattr $C$DW$T$7, DW_AT_byte_size(0x02)
|
||||
362
|
||||
363 $C$DW$T$8 .dwtag DW_TAG_base_type
|
||||
364 .dwattr $C$DW$T$8, DW_AT_encoding(DW_ATE_signed)
|
||||
365 .dwattr $C$DW$T$8, DW_AT_name("short")
|
||||
366 .dwattr $C$DW$T$8, DW_AT_byte_size(0x02)
|
||||
367
|
||||
368 $C$DW$T$9 .dwtag DW_TAG_base_type
|
||||
369 .dwattr $C$DW$T$9, DW_AT_encoding(DW_ATE_unsigned)
|
||||
370 .dwattr $C$DW$T$9, DW_AT_name("unsigned short")
|
||||
371 .dwattr $C$DW$T$9, DW_AT_byte_size(0x02)
|
||||
372
|
||||
373 $C$DW$T$10 .dwtag DW_TAG_base_type
|
||||
374 .dwattr $C$DW$T$10, DW_AT_encoding(DW_ATE_signed)
|
||||
375 .dwattr $C$DW$T$10, DW_AT_name("int")
|
||||
376 .dwattr $C$DW$T$10, DW_AT_byte_size(0x02)
|
||||
377
|
||||
378 $C$DW$T$11 .dwtag DW_TAG_base_type
|
||||
379 .dwattr $C$DW$T$11, DW_AT_encoding(DW_ATE_unsigned)
|
||||
380 .dwattr $C$DW$T$11, DW_AT_name("unsigned int")
|
||||
381 .dwattr $C$DW$T$11, DW_AT_byte_size(0x02)
|
||||
382
|
||||
383 $C$DW$T$25 .dwtag DW_TAG_volatile_type
|
||||
384 .dwattr $C$DW$T$25, DW_AT_type(*$C$DW$T$11)
|
||||
385
|
||||
386 $C$DW$T$12 .dwtag DW_TAG_base_type
|
||||
387 .dwattr $C$DW$T$12, DW_AT_encoding(DW_ATE_signed)
|
||||
388 .dwattr $C$DW$T$12, DW_AT_name("long")
|
||||
389 .dwattr $C$DW$T$12, DW_AT_byte_size(0x04)
|
||||
390
|
||||
391 $C$DW$T$13 .dwtag DW_TAG_base_type
|
||||
392 .dwattr $C$DW$T$13, DW_AT_encoding(DW_ATE_unsigned)
|
||||
393 .dwattr $C$DW$T$13, DW_AT_name("unsigned long")
|
||||
394 .dwattr $C$DW$T$13, DW_AT_byte_size(0x04)
|
||||
395
|
||||
396 $C$DW$T$14 .dwtag DW_TAG_base_type
|
||||
397 .dwattr $C$DW$T$14, DW_AT_encoding(DW_ATE_signed)
|
||||
398 .dwattr $C$DW$T$14, DW_AT_name("long long")
|
||||
MSP430 Assembler PC v20.2.5 Thu Dec 2 20:38:06 2021
|
||||
|
||||
Copyright (c) 2003-2018 Texas Instruments Incorporated
|
||||
C:\Users\LIBRAR~1\AppData\Local\Temp\{B3212681-677C-4407-B7A6-59626703CBB1} PAGE 9
|
||||
|
||||
399 .dwattr $C$DW$T$14, DW_AT_byte_size(0x08)
|
||||
400
|
||||
401 $C$DW$T$15 .dwtag DW_TAG_base_type
|
||||
402 .dwattr $C$DW$T$15, DW_AT_encoding(DW_ATE_unsigned)
|
||||
403 .dwattr $C$DW$T$15, DW_AT_name("unsigned long long")
|
||||
404 .dwattr $C$DW$T$15, DW_AT_byte_size(0x08)
|
||||
405
|
||||
406 $C$DW$T$16 .dwtag DW_TAG_base_type
|
||||
407 .dwattr $C$DW$T$16, DW_AT_encoding(DW_ATE_float)
|
||||
408 .dwattr $C$DW$T$16, DW_AT_name("float")
|
||||
409 .dwattr $C$DW$T$16, DW_AT_byte_size(0x04)
|
||||
410
|
||||
411 $C$DW$T$17 .dwtag DW_TAG_base_type
|
||||
412 .dwattr $C$DW$T$17, DW_AT_encoding(DW_ATE_float)
|
||||
413 .dwattr $C$DW$T$17, DW_AT_name("double")
|
||||
414 .dwattr $C$DW$T$17, DW_AT_byte_size(0x08)
|
||||
415
|
||||
416 $C$DW$T$18 .dwtag DW_TAG_base_type
|
||||
417 .dwattr $C$DW$T$18, DW_AT_encoding(DW_ATE_float)
|
||||
418 .dwattr $C$DW$T$18, DW_AT_name("long double")
|
||||
419 .dwattr $C$DW$T$18, DW_AT_byte_size(0x08)
|
||||
420
|
||||
421 .dwattr $C$DW$CU, DW_AT_language(DW_LANG_C)
|
||||
422
|
||||
423 ;***************************************************************
|
||||
424 ;* DWARF CIE ENTRIES *
|
||||
425 ;***************************************************************
|
||||
426
|
||||
427 $C$DW$CIE .dwcie 16
|
||||
428 .dwcfi cfa_register, 1
|
||||
429 .dwcfi cfa_offset, 0
|
||||
430 .dwcfi same_value, 0
|
||||
431 .dwcfi same_value, 1
|
||||
432 .dwcfi same_value, 3
|
||||
433 .dwcfi same_value, 4
|
||||
434 .dwcfi same_value, 5
|
||||
435 .dwcfi same_value, 6
|
||||
436 .dwcfi same_value, 7
|
||||
437 .dwcfi same_value, 8
|
||||
438 .dwcfi same_value, 9
|
||||
439 .dwcfi same_value, 10
|
||||
440 .dwendentry
|
||||
441
|
||||
442 ;***************************************************************
|
||||
443 ;* DWARF REGISTER MAP *
|
||||
444 ;***************************************************************
|
||||
445
|
||||
446 $C$DW$13 .dwtag DW_TAG_TI_assign_register
|
||||
447 .dwattr $C$DW$13, DW_AT_name("PC")
|
||||
448 .dwattr $C$DW$13, DW_AT_location[DW_OP_reg0]
|
||||
449
|
||||
450 $C$DW$14 .dwtag DW_TAG_TI_assign_register
|
||||
451 .dwattr $C$DW$14, DW_AT_name("SP")
|
||||
452 .dwattr $C$DW$14, DW_AT_location[DW_OP_reg1]
|
||||
453
|
||||
MSP430 Assembler PC v20.2.5 Thu Dec 2 20:38:06 2021
|
||||
|
||||
Copyright (c) 2003-2018 Texas Instruments Incorporated
|
||||
C:\Users\LIBRAR~1\AppData\Local\Temp\{B3212681-677C-4407-B7A6-59626703CBB1} PAGE 10
|
||||
|
||||
454 $C$DW$15 .dwtag DW_TAG_TI_assign_register
|
||||
455 .dwattr $C$DW$15, DW_AT_name("SR")
|
||||
456 .dwattr $C$DW$15, DW_AT_location[DW_OP_reg2]
|
||||
457
|
||||
458 $C$DW$16 .dwtag DW_TAG_TI_assign_register
|
||||
459 .dwattr $C$DW$16, DW_AT_name("CG")
|
||||
460 .dwattr $C$DW$16, DW_AT_location[DW_OP_reg3]
|
||||
461
|
||||
462 $C$DW$17 .dwtag DW_TAG_TI_assign_register
|
||||
463 .dwattr $C$DW$17, DW_AT_name("r4")
|
||||
464 .dwattr $C$DW$17, DW_AT_location[DW_OP_reg4]
|
||||
465
|
||||
466 $C$DW$18 .dwtag DW_TAG_TI_assign_register
|
||||
467 .dwattr $C$DW$18, DW_AT_name("r5")
|
||||
468 .dwattr $C$DW$18, DW_AT_location[DW_OP_reg5]
|
||||
469
|
||||
470 $C$DW$19 .dwtag DW_TAG_TI_assign_register
|
||||
471 .dwattr $C$DW$19, DW_AT_name("r6")
|
||||
472 .dwattr $C$DW$19, DW_AT_location[DW_OP_reg6]
|
||||
473
|
||||
474 $C$DW$20 .dwtag DW_TAG_TI_assign_register
|
||||
475 .dwattr $C$DW$20, DW_AT_name("r7")
|
||||
476 .dwattr $C$DW$20, DW_AT_location[DW_OP_reg7]
|
||||
477
|
||||
478 $C$DW$21 .dwtag DW_TAG_TI_assign_register
|
||||
479 .dwattr $C$DW$21, DW_AT_name("r8")
|
||||
480 .dwattr $C$DW$21, DW_AT_location[DW_OP_reg8]
|
||||
481
|
||||
482 $C$DW$22 .dwtag DW_TAG_TI_assign_register
|
||||
483 .dwattr $C$DW$22, DW_AT_name("r9")
|
||||
484 .dwattr $C$DW$22, DW_AT_location[DW_OP_reg9]
|
||||
485
|
||||
486 $C$DW$23 .dwtag DW_TAG_TI_assign_register
|
||||
487 .dwattr $C$DW$23, DW_AT_name("r10")
|
||||
488 .dwattr $C$DW$23, DW_AT_location[DW_OP_reg10]
|
||||
489
|
||||
490 $C$DW$24 .dwtag DW_TAG_TI_assign_register
|
||||
491 .dwattr $C$DW$24, DW_AT_name("r11")
|
||||
492 .dwattr $C$DW$24, DW_AT_location[DW_OP_reg11]
|
||||
493
|
||||
494 $C$DW$25 .dwtag DW_TAG_TI_assign_register
|
||||
495 .dwattr $C$DW$25, DW_AT_name("r12")
|
||||
496 .dwattr $C$DW$25, DW_AT_location[DW_OP_reg12]
|
||||
497
|
||||
498 $C$DW$26 .dwtag DW_TAG_TI_assign_register
|
||||
499 .dwattr $C$DW$26, DW_AT_name("r13")
|
||||
500 .dwattr $C$DW$26, DW_AT_location[DW_OP_reg13]
|
||||
501
|
||||
502 $C$DW$27 .dwtag DW_TAG_TI_assign_register
|
||||
503 .dwattr $C$DW$27, DW_AT_name("r14")
|
||||
504 .dwattr $C$DW$27, DW_AT_location[DW_OP_reg14]
|
||||
505
|
||||
506 $C$DW$28 .dwtag DW_TAG_TI_assign_register
|
||||
507 .dwattr $C$DW$28, DW_AT_name("r15")
|
||||
508 .dwattr $C$DW$28, DW_AT_location[DW_OP_reg15]
|
||||
MSP430 Assembler PC v20.2.5 Thu Dec 2 20:38:06 2021
|
||||
|
||||
Copyright (c) 2003-2018 Texas Instruments Incorporated
|
||||
C:\Users\LIBRAR~1\AppData\Local\Temp\{B3212681-677C-4407-B7A6-59626703CBB1} PAGE 11
|
||||
|
||||
509
|
||||
510 $C$DW$29 .dwtag DW_TAG_TI_assign_register
|
||||
511 .dwattr $C$DW$29, DW_AT_name("CIE_RETA")
|
||||
512 .dwattr $C$DW$29, DW_AT_location[DW_OP_reg16]
|
||||
513
|
||||
514 .dwendtag $C$DW$CU
|
||||
515
|
||||
|
||||
No Assembly Errors, No Assembly Warnings
|
||||
BIN
CPE325/Lab6_Problem2/Debug/main.obj
Normal file
BIN
CPE325/Lab6_Problem2/Debug/main.obj
Normal file
Binary file not shown.
167
CPE325/Lab6_Problem2/Debug/makefile
Normal file
167
CPE325/Lab6_Problem2/Debug/makefile
Normal file
@ -0,0 +1,167 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
################################################################################
|
||||
|
||||
SHELL = cmd.exe
|
||||
|
||||
CG_TOOL_ROOT := C:/ti/ccs1040/ccs/tools/compiler/ti-cgt-msp430_20.2.5.LTS
|
||||
|
||||
GEN_OPTS__FLAG :=
|
||||
GEN_CMDS__FLAG :=
|
||||
|
||||
ORDERED_OBJS += \
|
||||
"./main.obj" \
|
||||
"../lnk_msp430fg4618.cmd" \
|
||||
$(GEN_CMDS__FLAG) \
|
||||
-llibc.a \
|
||||
|
||||
-include ../makefile.init
|
||||
|
||||
RM := DEL /F
|
||||
RMDIR := RMDIR /S/Q
|
||||
|
||||
# All of the sources participating in the build are defined here
|
||||
-include sources.mk
|
||||
-include subdir_vars.mk
|
||||
-include subdir_rules.mk
|
||||
-include objects.mk
|
||||
|
||||
ifneq ($(MAKECMDGOALS),clean)
|
||||
ifneq ($(strip $(C55_DEPS)),)
|
||||
-include $(C55_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(C_UPPER_DEPS)),)
|
||||
-include $(C_UPPER_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(S67_DEPS)),)
|
||||
-include $(S67_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(S62_DEPS)),)
|
||||
-include $(S62_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(S_DEPS)),)
|
||||
-include $(S_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(OPT_DEPS)),)
|
||||
-include $(OPT_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(C??_DEPS)),)
|
||||
-include $(C??_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(ASM_UPPER_DEPS)),)
|
||||
-include $(ASM_UPPER_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(S??_DEPS)),)
|
||||
-include $(S??_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(C64_DEPS)),)
|
||||
-include $(C64_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(CXX_DEPS)),)
|
||||
-include $(CXX_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(S64_DEPS)),)
|
||||
-include $(S64_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(INO_DEPS)),)
|
||||
-include $(INO_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(CLA_DEPS)),)
|
||||
-include $(CLA_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(S55_DEPS)),)
|
||||
-include $(S55_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(SV7A_DEPS)),)
|
||||
-include $(SV7A_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(C62_DEPS)),)
|
||||
-include $(C62_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(C67_DEPS)),)
|
||||
-include $(C67_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(PDE_DEPS)),)
|
||||
-include $(PDE_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(K_DEPS)),)
|
||||
-include $(K_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(C_DEPS)),)
|
||||
-include $(C_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(CC_DEPS)),)
|
||||
-include $(CC_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(C++_DEPS)),)
|
||||
-include $(C++_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(C43_DEPS)),)
|
||||
-include $(C43_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(S43_DEPS)),)
|
||||
-include $(S43_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(ASM_DEPS)),)
|
||||
-include $(ASM_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(S_UPPER_DEPS)),)
|
||||
-include $(S_UPPER_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(CPP_DEPS)),)
|
||||
-include $(CPP_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(SA_DEPS)),)
|
||||
-include $(SA_DEPS)
|
||||
endif
|
||||
endif
|
||||
|
||||
-include ../makefile.defs
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
EXE_OUTPUTS += \
|
||||
Lab6_Problem2.out \
|
||||
|
||||
EXE_OUTPUTS__QUOTED += \
|
||||
"Lab6_Problem2.out" \
|
||||
|
||||
BIN_OUTPUTS += \
|
||||
Lab6_Problem2.hex \
|
||||
|
||||
BIN_OUTPUTS__QUOTED += \
|
||||
"Lab6_Problem2.hex" \
|
||||
|
||||
|
||||
# All Target
|
||||
all: $(OBJS) $(CMD_SRCS) $(GEN_CMDS)
|
||||
@$(MAKE) --no-print-directory -Onone "Lab6_Problem2.out"
|
||||
|
||||
# Tool invocations
|
||||
Lab6_Problem2.out: $(OBJS) $(CMD_SRCS) $(GEN_CMDS)
|
||||
@echo 'Building target: "$@"'
|
||||
@echo 'Invoking: MSP430 Linker'
|
||||
"C:/ti/ccs1040/ccs/tools/compiler/ti-cgt-msp430_20.2.5.LTS/bin/cl430" -vmsp --data_model=small -Ooff --use_hw_mpy=16 --advice:power=all --define=__MSP430FG4618__ -g --printf_support=full --diag_warning=225 --diag_wrap=off --display_error_number --silicon_errata=CPU19 --asm_listing -z -m"Lab6_Problem2.map" --heap_size=80 --stack_size=80 --cinit_hold_wdt=on -i"C:/ti/ccs1040/ccs/ccs_base/msp430/include" -i"C:/ti/ccs1040/ccs/tools/compiler/ti-cgt-msp430_20.2.5.LTS/lib" -i"C:/ti/ccs1040/ccs/tools/compiler/ti-cgt-msp430_20.2.5.LTS/include" --reread_libs --diag_wrap=off --display_error_number --warn_sections --xml_link_info="Lab6_Problem2_linkInfo.xml" --use_hw_mpy=16 --rom_model -o "Lab6_Problem2.out" $(ORDERED_OBJS)
|
||||
@echo 'Finished building target: "$@"'
|
||||
@echo ' '
|
||||
|
||||
Lab6_Problem2.hex: $(EXE_OUTPUTS)
|
||||
@echo 'Building secondary target: "$@"'
|
||||
@echo 'Invoking: MSP430 Hex Utility'
|
||||
"C:/ti/ccs1040/ccs/tools/compiler/ti-cgt-msp430_20.2.5.LTS/bin/hex430" --memwidth=8 --romwidth=8 --diag_wrap=off -o "Lab6_Problem2.hex" $(EXE_OUTPUTS__QUOTED)
|
||||
@echo 'Finished building secondary target: "$@"'
|
||||
@echo ' '
|
||||
|
||||
# Other Targets
|
||||
clean:
|
||||
-$(RM) $(BIN_OUTPUTS__QUOTED)$(EXE_OUTPUTS__QUOTED)
|
||||
-$(RM) "main.lst"
|
||||
-$(RM) "main.obj"
|
||||
-$(RM) "main.d"
|
||||
-@echo 'Finished clean'
|
||||
-@echo ' '
|
||||
|
||||
.PHONY: all clean dependents
|
||||
.SECONDARY:
|
||||
|
||||
-include ../makefile.targets
|
||||
|
||||
8
CPE325/Lab6_Problem2/Debug/objects.mk
Normal file
8
CPE325/Lab6_Problem2/Debug/objects.mk
Normal file
@ -0,0 +1,8 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
################################################################################
|
||||
|
||||
USER_OBJS :=
|
||||
|
||||
LIBS := -llibc.a
|
||||
|
||||
115
CPE325/Lab6_Problem2/Debug/sources.mk
Normal file
115
CPE325/Lab6_Problem2/Debug/sources.mk
Normal file
@ -0,0 +1,115 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
################################################################################
|
||||
|
||||
C55_SRCS :=
|
||||
A_SRCS :=
|
||||
ASM_UPPER_SRCS :=
|
||||
EXE_SRCS :=
|
||||
LDS_UPPER_SRCS :=
|
||||
CPP_SRCS :=
|
||||
CMD_SRCS :=
|
||||
O_SRCS :=
|
||||
ELF_SRCS :=
|
||||
C??_SRCS :=
|
||||
C64_SRCS :=
|
||||
C67_SRCS :=
|
||||
SA_SRCS :=
|
||||
S64_SRCS :=
|
||||
OPT_SRCS :=
|
||||
CXX_SRCS :=
|
||||
S67_SRCS :=
|
||||
S??_SRCS :=
|
||||
PDE_SRCS :=
|
||||
SV7A_SRCS :=
|
||||
K_SRCS :=
|
||||
CLA_SRCS :=
|
||||
S55_SRCS :=
|
||||
LD_UPPER_SRCS :=
|
||||
OUT_SRCS :=
|
||||
INO_SRCS :=
|
||||
LIB_SRCS :=
|
||||
ASM_SRCS :=
|
||||
S_UPPER_SRCS :=
|
||||
S43_SRCS :=
|
||||
LD_SRCS :=
|
||||
CMD_UPPER_SRCS :=
|
||||
C_UPPER_SRCS :=
|
||||
C++_SRCS :=
|
||||
C43_SRCS :=
|
||||
OBJ_SRCS :=
|
||||
LDS_SRCS :=
|
||||
S_SRCS :=
|
||||
CC_SRCS :=
|
||||
S62_SRCS :=
|
||||
C62_SRCS :=
|
||||
C_SRCS :=
|
||||
C55_DEPS :=
|
||||
C_UPPER_DEPS :=
|
||||
S67_DEPS :=
|
||||
S62_DEPS :=
|
||||
S_DEPS :=
|
||||
OPT_DEPS :=
|
||||
C??_DEPS :=
|
||||
ASM_UPPER_DEPS :=
|
||||
S??_DEPS :=
|
||||
C64_DEPS :=
|
||||
CXX_DEPS :=
|
||||
S64_DEPS :=
|
||||
INO_DEPS :=
|
||||
CLA_DEPS :=
|
||||
S55_DEPS :=
|
||||
SV7A_DEPS :=
|
||||
EXE_OUTPUTS :=
|
||||
C62_DEPS :=
|
||||
C67_DEPS :=
|
||||
PDE_DEPS :=
|
||||
K_DEPS :=
|
||||
C_DEPS :=
|
||||
CC_DEPS :=
|
||||
BIN_OUTPUTS :=
|
||||
C++_DEPS :=
|
||||
C43_DEPS :=
|
||||
S43_DEPS :=
|
||||
OBJS :=
|
||||
ASM_DEPS :=
|
||||
S_UPPER_DEPS :=
|
||||
CPP_DEPS :=
|
||||
SA_DEPS :=
|
||||
C++_DEPS__QUOTED :=
|
||||
OPT_DEPS__QUOTED :=
|
||||
S_UPPER_DEPS__QUOTED :=
|
||||
SA_DEPS__QUOTED :=
|
||||
C??_DEPS__QUOTED :=
|
||||
S67_DEPS__QUOTED :=
|
||||
C55_DEPS__QUOTED :=
|
||||
CC_DEPS__QUOTED :=
|
||||
ASM_UPPER_DEPS__QUOTED :=
|
||||
SV7A_DEPS__QUOTED :=
|
||||
S??_DEPS__QUOTED :=
|
||||
OBJS__QUOTED :=
|
||||
C67_DEPS__QUOTED :=
|
||||
K_DEPS__QUOTED :=
|
||||
S55_DEPS__QUOTED :=
|
||||
INO_DEPS__QUOTED :=
|
||||
C62_DEPS__QUOTED :=
|
||||
C_DEPS__QUOTED :=
|
||||
C_UPPER_DEPS__QUOTED :=
|
||||
C43_DEPS__QUOTED :=
|
||||
CPP_DEPS__QUOTED :=
|
||||
BIN_OUTPUTS__QUOTED :=
|
||||
C64_DEPS__QUOTED :=
|
||||
CXX_DEPS__QUOTED :=
|
||||
CLA_DEPS__QUOTED :=
|
||||
S_DEPS__QUOTED :=
|
||||
ASM_DEPS__QUOTED :=
|
||||
S43_DEPS__QUOTED :=
|
||||
EXE_OUTPUTS__QUOTED :=
|
||||
S64_DEPS__QUOTED :=
|
||||
S62_DEPS__QUOTED :=
|
||||
PDE_DEPS__QUOTED :=
|
||||
|
||||
# Every subdirectory with source files must be described here
|
||||
SUBDIRS := \
|
||||
. \
|
||||
|
||||
15
CPE325/Lab6_Problem2/Debug/subdir_rules.mk
Normal file
15
CPE325/Lab6_Problem2/Debug/subdir_rules.mk
Normal file
@ -0,0 +1,15 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
################################################################################
|
||||
|
||||
SHELL = cmd.exe
|
||||
|
||||
# Each subdirectory must supply rules for building sources it contributes
|
||||
%.obj: ../%.c $(GEN_OPTS) | $(GEN_FILES) $(GEN_MISC_FILES)
|
||||
@echo 'Building file: "$<"'
|
||||
@echo 'Invoking: MSP430 Compiler'
|
||||
"C:/ti/ccs1040/ccs/tools/compiler/ti-cgt-msp430_20.2.5.LTS/bin/cl430" -vmsp --data_model=small -Ooff --use_hw_mpy=16 --include_path="C:/ti/ccs1040/ccs/ccs_base/msp430/include" --include_path="C:/CPE325_Workspace/Lab6_Problem2" --include_path="C:/ti/ccs1040/ccs/tools/compiler/ti-cgt-msp430_20.2.5.LTS/include" --advice:power=all --define=__MSP430FG4618__ -g --printf_support=full --diag_warning=225 --diag_wrap=off --display_error_number --silicon_errata=CPU19 --asm_listing --preproc_with_compile --preproc_dependency="$(basename $(<F)).d_raw" $(GEN_OPTS__FLAG) "$<"
|
||||
@echo 'Finished building: "$<"'
|
||||
@echo ' '
|
||||
|
||||
|
||||
29
CPE325/Lab6_Problem2/Debug/subdir_vars.mk
Normal file
29
CPE325/Lab6_Problem2/Debug/subdir_vars.mk
Normal file
@ -0,0 +1,29 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
################################################################################
|
||||
|
||||
SHELL = cmd.exe
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
CMD_SRCS += \
|
||||
../lnk_msp430fg4618.cmd
|
||||
|
||||
C_SRCS += \
|
||||
../main.c
|
||||
|
||||
C_DEPS += \
|
||||
./main.d
|
||||
|
||||
OBJS += \
|
||||
./main.obj
|
||||
|
||||
OBJS__QUOTED += \
|
||||
"main.obj"
|
||||
|
||||
C_DEPS__QUOTED += \
|
||||
"main.d"
|
||||
|
||||
C_SRCS__QUOTED += \
|
||||
"../main.c"
|
||||
|
||||
|
||||
Reference in New Issue
Block a user