added more code
This commit is contained in:
@ -0,0 +1,18 @@
|
||||
Fitter Status : Successful - Thu Mar 11 19:58:38 2021
|
||||
Quartus Prime Version : 16.1.0 Build 196 10/24/2016 SJ Lite Edition
|
||||
Revision Name : Lab1Part2
|
||||
Top-level Entity Name : Lab1Part2
|
||||
Family : MAX 10
|
||||
Device : 10M50DAF484C7G
|
||||
Timing Models : Final
|
||||
Total logic elements : 5 / 49,760 ( < 1 % )
|
||||
Total combinational functions : 5 / 49,760 ( < 1 % )
|
||||
Dedicated logic registers : 0 / 49,760 ( 0 % )
|
||||
Total registers : 0
|
||||
Total pins : 20 / 360 ( 6 % )
|
||||
Total virtual pins : 0
|
||||
Total memory bits : 0 / 1,677,312 ( 0 % )
|
||||
Embedded Multiplier 9-bit elements : 0 / 288 ( 0 % )
|
||||
Total PLLs : 0 / 4 ( 0 % )
|
||||
UFM blocks : 0 / 1 ( 0 % )
|
||||
ADC blocks : 0 / 2 ( 0 % )
|
Reference in New Issue
Block a user