added more code
This commit is contained in:
16
EE203/Noah Woodlee/Lab2/part4/output_files/part4.map.summary
Normal file
16
EE203/Noah Woodlee/Lab2/part4/output_files/part4.map.summary
Normal file
@ -0,0 +1,16 @@
|
||||
Analysis & Synthesis Status : Successful - Sun Apr 25 14:22:09 2021
|
||||
Quartus Prime Version : 20.1.1 Build 720 11/11/2020 SJ Lite Edition
|
||||
Revision Name : part4
|
||||
Top-level Entity Name : part4
|
||||
Family : MAX 10
|
||||
Total logic elements : 19
|
||||
Total combinational functions : 19
|
||||
Dedicated logic registers : 0
|
||||
Total registers : 0
|
||||
Total pins : 23
|
||||
Total virtual pins : 0
|
||||
Total memory bits : 0
|
||||
Embedded Multiplier 9-bit elements : 0
|
||||
Total PLLs : 0
|
||||
UFM blocks : 0
|
||||
ADC blocks : 0
|
Reference in New Issue
Block a user